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公开(公告)号:WO2018202361A1
公开(公告)日:2018-11-08
申请号:PCT/EP2018/058096
申请日:2018-03-29
Applicant: ASML NETHERLANDS B.V.
Inventor: YPMA, Alexander , TABERY, Cyrus, Emil , VAN GORP, Simon, Hendrik, Celine , LIN, Chenxi , SONNTAG, Dag , CEKLI, Hakki, Ergun , ALVAREZ SANCHEZ, Ruben , LIU, Shih-Chin , HASTINGS, Simon, Philip, Spencer , MENCHTCHIKOV, Boris , DE RUITER, Christiaan, Theodoor , TEN BERGE, Peter , LERCEL, Michael, James , DUAN, Wei , GUITTET, Pierre-Yves, Jerome, Yvan
IPC: G03F7/20
Abstract: A method and associated computer program for predicting an electrical characteristic of a substrate subject to a process. The method includes determining a sensitivity of the electrical characteristic to a process characteristic, based on analysis of electrical metrology data including measured electrical characteristics from previously processed substrates and process metrology data including measurements of at least one parameter related to the process characteristic measured from the previously processed substrates; obtaining process metrology data related to the substrate describing the at least one parameter; and predicting the electrical characteristic of the substrate based on the sensitivity and the process metrology data.
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2.
公开(公告)号:WO2022023304A1
公开(公告)日:2022-02-03
申请号:PCT/EP2021/070930
申请日:2021-07-27
Applicant: ASML NETHERLANDS B.V.
Inventor: GAURY, Benoit, Herve , LA FONTAINE, Bruno , JIANG, Jun , HASAN, Shakeeb Bin , KANAI, Kenichi , VAN RENS, Jasper, Frans, Mathijs , TABERY, Cyrus, Emil , MA, Long , PATTERSON, Oliver, Desmond , ZHANG, Jian , JEN, Chih-Yu , WANG, Yixiang
IPC: H01J37/22 , H01J37/244
Abstract: Systems and methods of observing a sample using a charged-particle beam apparatus in voltage contrast mode are disclosed. The charged-particle beam apparatus comprises a charged- particle source, an optical source, a charged-particle detector configured to detect charged particles, and a controller having circuitry configured to apply a first signal to cause the optical source to generate the optical pulse, apply a second signal to the charged-particle detector to detect the second plurality of charged particles, and adjust a time delay between the first and the second signals. In some embodiments, the controller having circuitry may be further configured to acquire a plurality of images of a structure, to determine an electrical characteristic of the structure based on the rate of gray level variation of the plurality of images of the structure, and to simulate, using a model, a physical characteristic of the structure based on the determined electrical characteristic.
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公开(公告)号:WO2022033793A1
公开(公告)日:2022-02-17
申请号:PCT/EP2021/069613
申请日:2021-07-14
Applicant: ASML NETHERLANDS B.V.
Inventor: COLLIGNON, Tijmen, Pieter , SMAL, Pavel , TABERY, Cyrus, Emil , DOS SANTOS GUZELLA, Thiago , BASTANI, Vahid
Abstract: Methods and associated apparatus for identifying contamination in a semiconductor fab are disclosed. The methods comprise determining contamination map data for a plurality of semiconductor wafers clamped to a wafer table after being processed in the semiconductor fab. Combined contamination map data is determined based, at least in part, on a combination of the contamination map data of the plurality of semiconductor wafers. The combined contamination map data is combined to reference data. The reference data comprises one or more values for the combined contamination map data that are indicative of contamination in one or more tools in the semiconductor fab.
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4.
公开(公告)号:WO2020114692A1
公开(公告)日:2020-06-11
申请号:PCT/EP2019/080129
申请日:2019-11-04
Applicant: ASML NETHERLANDS B.V.
Inventor: LIN, Chenxi , TABERY, Cyrus, Emil , CEKLI, Hakki, Ergun , HASTINGS, Simon, Philip, Spencer , MENCHTCHIKOV, Boris , ZOU, Yi , CHENG, Yana , GENIN, Maxime, Philippe, Frederic , CHEN, Tzu-Chao , HARUTYUNYAN, Davit , ZHANG, Youping
Abstract: Described is a method for determining a root cause affecting yield in a process for manufacturing devices on a substrate, the method comprising; obtaining yield distribution data comprising the distribution of a yield parameter across the substrate or part thereof; obtaining sets of metrology data, each set comprising a spatial variation of a process parameter over the substrate or part thereof corresponding to a different layer of the substrate; comparing the yield distribution data and metrology data based on a similarity metric describing a spatial similarity between the yield distribution data and an individual set out of the sets of the metrology data; and determining a first similar set of metrology data out of the sets of metrology data, being the first set of metrology data in terms of processing order for the corresponding layers, which is determined to be similar to the yield distribution data.
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公开(公告)号:WO2022012873A1
公开(公告)日:2022-01-20
申请号:PCT/EP2021/066813
申请日:2021-06-21
Applicant: ASML NETHERLANDS B.V.
Inventor: GKOROU, Dimitra , BASTANI, Vahid , SAHRAEIAN, Reza , TABERY, Cyrus, Emil
IPC: H01L21/66 , G03F7/20 , G05B19/418 , G05B23/02 , G03F7/70491 , G03F7/705 , G05B2219/45031 , G05B23/024 , G05B23/0243 , H01L21/67271 , H01L22/12 , H01L22/14 , H01L22/20
Abstract: Methods and apparatus for classifying semiconductor wafers. The method comprises: sorting a set of semiconductor wafers, using a model, into a plurality of sub-sets based on parameter data corresponding to one or more parameters of the set of semiconductor wafers, wherein the parameter data for semiconductor wafers in a sub-set include one or more common characteristics; identifying one or more semiconductor wafers within a sub-set based on a probability of the one or more semiconductor wafers being correctly allocated to the sub-set; comparing the parameter data of the one or more identified semiconductor wafers to reference parameter data; and reconfiguring the model based on the comparison. The comparison is undertaken by a human to provide constraints for the model. The apparatus is configured to undertake the method.
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公开(公告)号:WO2020114686A1
公开(公告)日:2020-06-11
申请号:PCT/EP2019/079691
申请日:2019-10-30
Applicant: ASML NETHERLANDS B.V.
Inventor: ZHANG, Youping , MENCHTCHIKOV, Boris , TABERY, Cyrus, Emil , ZOU, Yi , LIN, Chenxi , CHENG, Yana , HASTINGS, Simon, Philip, Spencer , GENIN, Maxime
IPC: G03F7/20
Abstract: Described is a method for predicting yield relating to a process of manufacturing semiconductor devices on a substrate, the method comprising: obtaining a trained first model which translates modeled parameters into a yield parameter, said modeled parameters comprising: a) geometrical parameters associated with one or more of: a geometric characteristic, dimension or position of a device element manufactured by the process and b) trained free parameters; obtaining process parameter data comprising process parameters characterizing the process; converting the process parameter data into values of the geometrical parameters; and predicting the yield parameter using the trained first model and the values of the geometrical parameters.
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公开(公告)号:WO2020114684A1
公开(公告)日:2020-06-11
申请号:PCT/EP2019/079640
申请日:2019-10-30
Applicant: ASML NETHERLANDS B.V.
Inventor: SLACHTER, Abraham , TEL, Wim, Tjibbo , SLOTBOOM, Daan, Maurits , TIMOSHKOV, Vadim, Yourievich , VAN DER STRATEN, Koen, Wilhelmus, Cornelis, Adrianus , MENCHTCHIKOV, Boris , HASTINGS, Simon, Philip, Spencer , TABERY, Cyrus, Emil , GENIN, Maxime, Philippe, Frederic , ZHANG, Youping , ZOU, Yi , LIN, Chenxi , CHENG, Yana
IPC: G03F7/20
Abstract: A method for analyzing a process, the method including: obtaining a multi-dimensional probability density function representing an expected distribution of values for a plurality of process parameters; obtaining a performance function relating values of the process parameters to a performance metric of the process; and using the performance function to map the probability density function to a performance probability function having the process parameters as arguments.
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公开(公告)号:WO2022111945A1
公开(公告)日:2022-06-02
申请号:PCT/EP2021/080243
申请日:2021-11-01
Applicant: ASML NETHERLANDS B.V.
Inventor: ZHANG, Huaichen , TABERY, Cyrus, Emil
IPC: G03F7/20
Abstract: Described herein is an apparatus and a method for generating a metrology mark structure that can be formed on a chip for measuring overlay characteristics induced by one or more processes performed on the chip by determining features for the metrology mark structure based on a pattern distribution. The method involves obtaining a first function to characterize an overlay fingerprint induced by a process performed on a substrate. Based on the first function, a pattern distribution is derived, the pattern distribution being indicative of a number of features (e.g., indicative of density) within a portion of the substrate. Based on the pattern distribution, physical characteristics (e.g., shape, size, etc.) of the features of the metrology mark structure is determined.
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公开(公告)号:WO2020126242A1
公开(公告)日:2020-06-25
申请号:PCT/EP2019/081282
申请日:2019-11-14
Applicant: ASML NETHERLANDS B.V.
Inventor: BRANTJES, Nicolaas Petrus Marcus , COX, Matthijs , MENCHTCHIKOV, Boris , TABERY, Cyrus, Emil , ZHANG, Youping , ZOU, Yi , LIN, Chenxi , CHENG, Yana , HASTINGS, Simon, Philip, Spencer , GENIN, Maxime, Philippe, Frederic
Abstract: Disclosed is a method for determining a correction relating to a performance metric of a semiconductor manufacturing process, the method comprising: obtaining a first set of pre-process metrology data; processing the first set of pre-process metrology data by decomposing the pre-process metrology data into one or more components which: a) correlate to the performance metric; or b) are at least partially correctable by a control process which is part of the semiconductor manufacturing process; and applying a trained model to the processed first set of pre-process metrology data to determine the correction for said semiconductor manufacturing process.
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公开(公告)号:WO2019115391A1
公开(公告)日:2019-06-20
申请号:PCT/EP2018/083994
申请日:2018-12-07
Applicant: ASML NETHERLANDS B.V.
Inventor: TABERY, Cyrus, Emil , VAN GORP, Simon, Hendrik, Celine , HASTINGS, Simon, Philip, Spencer , PETERSON, Brennan
Abstract: A measurement mark is disclosed. According to certain embodiments, the measurement mark includes a set of first test structures developed in a first layer on a substrate, each of the set of first test structures comprising a plurality of first features made of first conducting material. The measurement mark also includes a set of second test structures developed in a second layer adjacent to the first layer, each of the set of second test structures comprising a plurality of second features made of second conducting material. The measurement mark is configured to indicate connectivity between the set of first test structures and associated second test structures in the set of second test structures when imaged using a voltage-contrast imaging method.
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