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公开(公告)号:JP2006295196A
公开(公告)日:2006-10-26
申请号:JP2006111855
申请日:2006-04-14
Applicant: Infineon Technologies Ag , インフィネオン テクノロジーズ アクチエンゲゼルシャフト
Inventor: AVELLAN ALEJANDRO , HECHT THOMAS , JAKSCHIK STEFAN , SCHROEDER UWE
IPC: H01L27/108 , H01L21/8242 , H01L29/78
CPC classification number: H01L28/65 , H01L27/1087 , H01L29/66181
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing an electronic element such as a DRAM semiconductor memory with which proper capacitor characteristics or recording characteristics can be obtained even if the capacitor structure is very small, or a field effect transistor.
SOLUTION: In a method for manufacturing an electronic element in which a dielectric (130) and at least one capacitor (150) having at least one connection electrode (120, 140) are formed, particularly, a DRAM semiconductor memory or a field effect transistor, in order to create a capacitor to obtain optimum capacitor characteristics even if the capacitor structure is very small, the dielectric (130) or the connection electrode (120, 140) is formed such that the occurrence of transient polarization is suppressed or at least reduced.
COPYRIGHT: (C)2007,JPO&INPITAbstract translation: 要解决的问题:提供一种用于制造诸如DRAM半导体存储器的电子元件的方法,即使电容器结构非常小也能够获得适当的电容器特性或记录特性,或场效应晶体管。 解决方案:在制造其中形成电介质(130)和至少一个具有至少一个连接电极(120,140)的电容器(150)的电子元件的方法中,特别地,DRAM半导体存储器或 场效应晶体管,为了形成电容器以获得最佳的电容器特性,即使电容器结构非常小,电介质(130)或连接电极(120,140)形成为使得瞬态极化的发生被抑制或 至少减少 版权所有(C)2007,JPO&INPIT
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公开(公告)号:DE10258201B4
公开(公告)日:2008-07-03
申请号:DE10258201
申请日:2002-12-12
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: RAJARAO JAMMY , KUDELKA STEPHAN , MACSTAY IRENE , RAHN STEPHEN , SCHROEDER UWE , TEWS HELMUT
IPC: H01L21/308 , H01L21/02 , H01L21/8242
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公开(公告)号:DE10320029A1
公开(公告)日:2003-12-04
申请号:DE10320029
申请日:2003-05-06
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: GOLDBACH MATTHIAS , HAUF MANFRED , JAMMY RAIARAO , MCSTAY IRENE , ROUSSEAU JEAN-MARC , SCHROEDER UWE , SCHUMANN DIRK , SEIDL HARALD , SELL BERNHARD , SHEPARD JOSEPH F , TEWS HELMUT
IPC: H01L21/02 , H01L21/441 , H01L21/4763 , H01L21/8242 , H01L23/48 , H01L27/108
Abstract: Semiconductor devices having deep trenches with fill material therein having low resistivity are provided along with methods of fabricating such semiconductor devices.
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公开(公告)号:DE10344862A1
公开(公告)日:2004-04-15
申请号:DE10344862
申请日:2003-09-26
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: DIVAKARUNI RAMACHANDRA , FEHLAUER GERD T , KUDELKA STEPHAN , MANDELMAN JACK A , SCHROEDER UWE , TEWS HELMUT
IPC: H01L21/334 , H01L21/8242 , H01L27/108 , H01L29/94
Abstract: A trench capacitor memory cell structure is provided with includes a vertical collar region that suppresses current leakage of an adjacent vertical parasitic transistor that exists between the vertical MOSFET and the underlying trench capacitor. The vertical collar isolation, which has a vertical length of about 0.50 mum or less, includes a first portion that is present partially outside the trench and a second portion that is present inside the trench. The first portion of the collar oxide is thicker than said second portion oxide thereby reducing parasitic current leakage.
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公开(公告)号:DE10246306A1
公开(公告)日:2003-04-30
申请号:DE10246306
申请日:2002-10-04
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: CHUDZIK MICHAEL , GLUSCHENKOV OLEG , JAMMY RAJARAO , SCHROEDER UWE , TEWS HELMUT
IPC: H01L21/316 , H01L21/321 , H01L21/8242 , H01G4/06
Abstract: An improved capacitor is formed by a process where an improved node dielectric layer is formed with an improved dielectric constant by performing an Free Radical Enhanced Rapid Thermal Oxidation (FRE RTO) step during formation of the node dielectric layer. Use of an FRE RTO step instead of the conventional furnace oxidation step produces a cleaner oxide with a higher dielectric constant and higher capacitance. Other specific embodiments of the invention include improved node dielectric layer by one or more additional nitridation steps, done by either Remote Plasma Nitridation (RPN), Rapid Thermal Nitridation (RTN), Decoupled Plasma Nitridation (DPN) or other nitridation method; selective oxidation; use of a metal layer rather than a SiN layer as the dielectric base; and selective oxidation of the metal layer.
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公开(公告)号:DE10344862B4
公开(公告)日:2007-12-20
申请号:DE10344862
申请日:2003-09-26
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: DIVAKARUNI RAMACHANDRA , FEHLAUER GERD T , KUDELKA STEPHAN , MANDELMAN JACK A , SCHROEDER UWE , TEWS HELMUT
IPC: H01L27/108 , H01L21/334 , H01L21/8242 , H01L29/94
Abstract: A trench capacitor memory cell structure is provided with includes a vertical collar region that suppresses current leakage of an adjacent vertical parasitic transistor that exists between the vertical MOSFET and the underlying trench capacitor. The vertical collar isolation, which has a vertical length of about 0.50 mum or less, includes a first portion that is present partially outside the trench and a second portion that is present inside the trench. The first portion of the collar oxide is thicker than said second portion oxide thereby reducing parasitic current leakage.
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公开(公告)号:DE10258201A1
公开(公告)日:2003-07-10
申请号:DE10258201
申请日:2002-12-12
Applicant: INFINEON TECHNOLOGIES AG , IBM
Inventor: RAIARAO JAMMY , KUDELKA STEPHAN , MACSTAV IRENE , RAHN STEPHEN , SCHROEDER UWE , TEWS HELMUT
IPC: H01L21/02 , H01L21/8242 , H01L21/308
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公开(公告)号:DE102005018029A1
公开(公告)日:2006-10-26
申请号:DE102005018029
申请日:2005-04-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: JAKSCHIK STEFAN , SCHROEDER UWE , HECHT THOMAS , AVELLAN ALEJANDRO
IPC: H01L21/8242
Abstract: An electrical component, such as a DRAM semiconductor memory or a field-effect transistor is fabricated. At least one capacitor having a dielectric (130) and at least one connection electrode (120, 140) are fabricated. To enable the capacitors fabricated to have optimum storage properties even for very small capacitor structures, the dielectric (130) or the connection electrode (120, 140) are formed in such a manner that transient polarization effects are prevented or at least reduced.
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公开(公告)号:DE10142580B4
公开(公告)日:2006-07-13
申请号:DE10142580
申请日:2001-08-31
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SEIDL HARALD , GUTSCHE MARTIN , HECHT THOMAS , LEONHARDT MATTHIAS , SCHROEDER UWE
IPC: H01L21/8242
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公开(公告)号:DE10357756B4
公开(公告)日:2006-03-09
申请号:DE10357756
申请日:2003-12-10
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HECHT THOMAS , SCHROEDER UWE , JAKSCHIK STEFAN
IPC: C23C16/00 , C23C16/30 , C23C16/455 , H01L21/314 , H01L21/8242
Abstract: Production of metal oxynitride layers comprises depositing a chemically reactive metal compound on the surface of a substrate in the gas phase and reacting with nitrogen oxide and/or dinitrogen monoxide. The metal oxynitride is not silicon oxynitride (SiON). An independent claim is also included for a metal oxynitride layer produced by the above process.
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