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1.
公开(公告)号:WO0231859A9
公开(公告)日:2003-05-22
申请号:PCT/US0142611
申请日:2001-10-10
Applicant: LAM RES CORP , DHINDSA RAJINDER , SRINIVASAN MUKUND , EPPLER AARON , LENZ ERIC
Inventor: DHINDSA RAJINDER , SRINIVASAN MUKUND , EPPLER AARON , LENZ ERIC
IPC: H01J37/32 , H01L21/3065
CPC classification number: H01J37/32009 , H01J37/3244 , Y10T156/10
Abstract: A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.
Abstract translation: 一种具有前表面的等离子体放电电极,其中心部分包括排出形成等离子体的工艺气体的气体出口和基本上围绕气体出口的周边部分。 周边部分具有用于控制由电极形成的等离子体的密度的至少一个步骤。 在等离子体蚀刻装置等平板等离子体处理装置中,电极可以用作接地上电极。 可以改变下部电极上的台阶和相应的边缘环的几何特征以实现跨晶片表面所需的蚀刻速率分布。
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公开(公告)号:EP1661171A4
公开(公告)日:2009-03-11
申请号:EP04781695
申请日:2004-08-20
Applicant: LAM RES CORP
Inventor: DHINDSA RAJINDER , SADJADI REZA S M , KOZAKEVICH FELIX , TRUSSELL DAVE , LI LUMIN , LENZ ERIC , RUSU CAMELIA , SRINIVASAN MUKUND , EPPLER AARON , TIETZ JIM , MARKS JEFFREY
IPC: H01J37/32 , B23B3/10 , H01L21/311 , H01L21/467 , H05H1/46
CPC classification number: H01J37/32174 , H01J37/32082 , H01J37/32165
Abstract: A workpiece (18) is processed with a plasma (8) in a vacuum plasma processing chamber (10) by exciting the plasma at several frequencies (51, 52, 54, 56, 58), such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes top central (14, 36, 36a) and bottom electrodes (13, 16) and a peripheral top (42) and/or bottom electrode (34) arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation ftequencies to the exclusion of other frequencies. Controller 24 is employed to direct parameter control of various motors (M), valves (V), frequencies (58), power (59), temperature control means (25, 45) and set points (50).
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公开(公告)号:WO2005020264A2
公开(公告)日:2005-03-03
申请号:PCT/US2004027064
申请日:2004-08-20
Applicant: LAM RES CORP , DHINDSA RAJINDER , SADJADI REZA S M , KOZAKEVICH FELIX , TRUSSELL DAVE , LI LUMIN , LENZ ERIC , RUSU CAMELIA , SRINIVASAN MUKUND , EPPLER AARON , TIETZ JIM , MARKS JEFFREY
Inventor: DHINDSA RAJINDER , SADJADI REZA S M , KOZAKEVICH FELIX , TRUSSELL DAVE , LI LUMIN , LENZ ERIC , RUSU CAMELIA , SRINIVASAN MUKUND , EPPLER AARON , TIETZ JIM , MARKS JEFFREY
CPC classification number: H01J37/32174 , H01J37/32082 , H01J37/32165
Abstract: A workpiece is processed with a plasma in a vacuum plasma processing chamber by exciting the plasma at several frequencies such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes central top and bottom electrodes and a peripheral top and/or bottom electrode arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation ftequencies to the exclusion of other frequencies.
Abstract translation: 通过以几个频率激发等离子体,在真空等离子体处理室中用等离子体处理工件,使得等离子体被几个频率激发同时导致在等离子体中发生几种不同的现象。 腔室包括中心顶部和底部电极以及由RF供电的外围顶部和/或底部电极装置,或者通过将至少一个等离子体激发频率传递到排除另一个等离子体激发频率的滤波器装置连接到参考电位 频率。
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4.
公开(公告)号:WO0231859A3
公开(公告)日:2002-09-12
申请号:PCT/US0142611
申请日:2001-10-10
Applicant: LAM RES CORP , DHINDSA RAJINDER , SRINIVASAN MUKUND , EPPLER AARON , LENZ ERIC
Inventor: DHINDSA RAJINDER , SRINIVASAN MUKUND , EPPLER AARON , LENZ ERIC
IPC: H01J37/32 , H01L21/3065
CPC classification number: H01J37/32009 , H01J37/3244 , Y10T156/10
Abstract: A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.
Abstract translation: 一种具有前表面的等离子体放电电极,其中心部分包括排出形成等离子体的工艺气体的气体出口和基本上围绕气体出口的周边部分。 周边部分具有用于控制由电极形成的等离子体的密度的至少一个步骤。 在等离子体蚀刻装置等平板等离子体处理装置中,电极可以用作接地上电极。 可以改变下部电极上的台阶和相应的边缘环的几何特征以实现跨晶片表面所需的蚀刻速率分布。
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公开(公告)号:JP2010187023A
公开(公告)日:2010-08-26
申请号:JP2010113921
申请日:2010-05-18
Applicant: Lam Res Corp , ラム リサーチ コーポレイション
Inventor: KAMP TOM A , GOTTSCHO RICHARD , LEE STEVE , LEE CHRIS , YAMAGUCHI YOKO , VAHEDI VAHID , EPPLER AARON
IPC: H01L21/3065 , H01L21/00 , H01L21/311 , H01L21/683 , H01L21/768
CPC classification number: H01L21/67248 , H01L21/31116 , H01L21/67069 , H01L21/6831 , H01L21/76804
Abstract: PROBLEM TO BE SOLVED: To provide an etching method in which etching process controllability is improved. SOLUTION: An etching processor for etching a wafer includes a chuck for holding the wafer and a temperature sensor for informing a temperature of the wafer. The chuck includes a heater controlled by a temperature control system. The temperature sensor is operatively coupled to the temperature control system to keep the temperature of the chuck at a selectable setting temperature. A first setting temperature and a second setting temperature are selected. The wafer is placed on the chuck and set to the first setting temperature. The wafer is then processed at the first setting temperature for a first period of time and at the second setting temperature for a second period of time. COPYRIGHT: (C)2010,JPO&INPIT
Abstract translation: 要解决的问题:提供蚀刻工艺可控性提高的蚀刻方法。 解决方案:用于蚀刻晶片的蚀刻处理器包括用于保持晶片的卡盘和用于通知晶片温度的温度传感器。 卡盘包括由温度控制系统控制的加热器。 温度传感器可操作地耦合到温度控制系统以将卡盘的温度保持在可选择的设定温度。 选择第一设定温度和第二设定温度。 将晶片放置在卡盘上并设定为第一设定温度。 然后将晶片在第一设定温度下处理第一时间段,并在第二设定温度下处理第二时间段。 版权所有(C)2010,JPO&INPIT
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公开(公告)号:DE60140893D1
公开(公告)日:2010-02-04
申请号:DE60140893
申请日:2001-10-10
Applicant: LAM RES CORP
Inventor: DHINDSA RAJINDER , SRINIVASAN MUKUND , EPPLER AARON , LENZ ERIC
IPC: H01J37/32 , H01L21/3065
Abstract: A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.
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公开(公告)号:AU1188602A
公开(公告)日:2002-04-22
申请号:AU1188602
申请日:2001-10-10
Applicant: LAM RES CORP
Inventor: DHINDSA RAJINDER , SRINIVASAN MUKUND , EPPLER AARON , LENZ ERIC
IPC: H01J37/32 , H01L21/3065
Abstract: A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.
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公开(公告)号:AT362652T
公开(公告)日:2007-06-15
申请号:AT03728281
申请日:2003-03-25
Applicant: LAM RES CORP
Inventor: KAMP TOM , GOTTSCHO RICHARD , LEE STEVE , LEE CHRIS , YAMAGUCHI YOKO , VAHEDI VAHID , EPPLER AARON
IPC: H01L21/3065 , H01L21/324 , H01L21/00 , H01L21/311 , H01L21/68 , H01L21/683 , H01L21/768
Abstract: An etch processor for etching a wafer includes a chuck for holding the wafer and a temperature sensor reporting a temperature of the wafer. The chuck includes a heater controlled by a temperature control system. The temperature sensor is operatively coupled to the temperature control system to maintain the temperature of the chuck at a selectable setpoint temperature. A first setpoint temperature and a second setpoint temperature are selected. The wafer is placed on the chuck and set to the first setpoint temperature. The wafer is then processed for a first period of time at the first setpoint temperature and for a second period of time at the second setpoint temperature.
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9.
公开(公告)号:AU2003251519A1
公开(公告)日:2003-12-31
申请号:AU2003251519
申请日:2003-06-13
Applicant: LAM RES CORP
Inventor: EPPLER AARON , SRINIVASAN MUKUND , CHEBI ROBERT
IPC: H01L21/3065 , H01L21/027 , H01L21/311 , H01L21/3213
Abstract: A process of etching openings in a dielectric layer includes supporting a semiconductor substrate in a plasma etch reactor, the substrate having a dielectric layer and a patterned photoresist and/or hardmask layer above the dielectric layer; supplying to the plasma etch reactor an etchant gas comprising (a) a fluorocarbon gas (CxFyHz, where x>=1, y>=1, and z>=0), (b) a silane-containing gas, hydrogen or a hydrocarbon gas (CxHy, where x>=1 and y>=4), (c) an optional oxygen-containing gas, and (d) an optional inert gas, wherein the flow rate ratio of the silane-containing gas to fluorocarbon gas is less than or equal to 0.1, or the flow rate ratio of the hydrogen or hydrocarbon gas to fluorocarbon gas is less than or equal to 0.5; energizing the etchant gas into a plasma; and plasma etching openings in the dielectric layer with enhanced photoresist/hardmask to dielectric layer selectivity and/or minimal photoresist distortion or striation.
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公开(公告)号:SG10201406081QA
公开(公告)日:2015-04-29
申请号:SG10201406081Q
申请日:2014-09-25
Applicant: LAM RES CORP
Inventor: GUHA JOYDEEP , REDDY SIRISH K , CHATTOPADHYAY KAUSHIK , MOUNTSIER THOMAS W , EPPLER AARON , LILL THORSTEN , VAHEDI VAHID , SINGH HARMEET
Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.
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