公开(公告)号：US5440454A

公开(公告)日：1995-08-08

申请号：US277992

申请日：1994-07-20

Applicant: Kaoru Hashimoto ,  Tatsuo Chiyonobu ,  Kyoichiro Kawano ,  Kouji Watanabe

Inventor： Kaoru Hashimoto ,  Tatsuo Chiyonobu ,  Kyoichiro Kawano ,  Kouji Watanabe

IPC: H01R13/03 ,  H01L21/48 ,  H01L23/498 ,  H01R24/00 ,  H01R43/00 ,  H01R43/16 ,  H05K3/34 ,  H05K1/02

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/49811 ,  H01L23/49866 ,  H05K3/3436 ,  H05K3/3463 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01322 ,  H05K2201/0373 ,  H05K2201/09863 ,  H05K2203/0594 ,  H05K2203/1105 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49204 ,  Y10T29/49215

Abstract: An electrical connecting device including a first circuit board providing thereon with input/output terminals, each of the terminals having a tip surface coated with gallium and a second circuit board providing thereon with contact terminals, each of the terminals having a tip surface coated with indium or tin. A low-melting point alloy layer is formed by a mutual action between gallium and indium or tin, when the input/output terminals of the first circuit board are in contact with the respective terminals of the second circuit board and electrically connected to each other. The second metal layer includes a plurality of wire-like metal supports extending substantially perpendicular to the surface of the terminal and a low-melting point metal retained by the wire-like metal supports.

Abstract translation: 一种电连接装置，包括在其上设置有输入/输出端子的第一电路板，每个端子具有涂覆有镓的尖端表面和在其上设置有接触端子的第二电路板，每个端子具有涂覆有铟的尖端表面 或锡。 当第一电路板的输入/输出端子与第二电路板的各个端子接触并且彼此电连接时，通过镓和铟或锡之间的相互作用形成低熔点合金层。 第二金属层包括大致垂直于端子表面延伸的多个线状金属支撑体和由线状金属支撑体保持的低熔点金属。

公开(公告)号：US5334279A

公开(公告)日：1994-08-02

申请号：US113392

申请日：1993-08-27

Applicant: George D. Gregoire

Inventor： George D. Gregoire

IPC: B29C33/38 ,  B29C33/42 ,  B29C33/56 ,  H05K1/00 ,  H05K1/11 ,  H05K3/00 ,  H05K3/02 ,  H05K3/06 ,  H05K3/10 ,  H05K3/20 ,  H05K3/38 ,  B44C1/22 ,  C23F1/00

CPC classification number: H05K1/111 ,  B29C33/3878 ,  B29C33/42 ,  B29C33/56 ,  H05K3/0014 ,  H05K3/205 ,  B29L2031/3425 ,  H05K1/0284 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09581 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09981 ,  H05K2203/0108 ,  H05K2203/0113 ,  H05K2203/0315 ,  H05K3/025 ,  H05K3/061 ,  H05K3/107 ,  H05K3/384 ,  H05K3/385 ,  Y02P70/611 ,  Y10S428/901 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T428/24479 ,  Y10T428/24537 ,  Y10T428/2457 ,  Y10T428/24917

Abstract: A new and improved printed circuit board tool and method of making and using it, to produce three dimensional printed circuit boards having grooves with strongly bonded or laminated metallic pads therein. The printed circuit board tool includes a metallized male mold substrate having a plurality of groove forming projections disposed in the substrate surface. The method of making the metallized mold includes forming a female parent or predecessor master tool that may be used to produce a large number of the metallized male molds for producing new and improved three-dimensional printed circuit boards. The new and improved three-dimensional printed circuit board includes a substrate composed of a high heat deflective plastic, and a plurality of recesses or grooves molded into the substrate surface for receiving therein the fine pitch, closely spaced-apart leads of an integrated circuit. A plurality of metallized sunken pads or lands are adhered or bonded within the grooves for establishing an electrical path within each groove.

Abstract translation: 一种新的改进的印刷电路板工具及其制造和使用方法，用于生产具有在其中具有强粘合或层压金属垫的凹槽的三维印刷电路板。 印刷电路板工具包括具有设置在基板表面中的多个凹槽形成突起的金属化阳模基板。 制造金属化模具的方法包括形成可用于生产大量用于生产新的和改进的三维印刷电路板的金属化阳模的母本或前驱主工具。 新型改进的三维印刷电路板包括由高热偏转塑料构成的基板和模制到基板表面中的多个凹槽或凹槽，用于在其中接收集成电路的细间距，紧密间隔的引线。 多个金属化的凹陷垫或焊盘粘合或粘合在凹槽内，以在每个凹槽内建立电路径。

公开(公告)号：US4519877A

公开(公告)日：1985-05-28

申请号：US665535

申请日：1984-10-26

Applicant: Raymond E. Wiech, Jr.

Inventor： Raymond E. Wiech, Jr.

IPC: H05K1/03 ,  H05K1/09 ,  H05K3/04 ,  H05K3/06 ,  H05K3/07 ,  H05K3/10 ,  H05K3/12 ,  C25D5/02 ,  C25D5/48 ,  C25D5/50

CPC classification number: H05K3/1258 ,  H05K3/045 ,  H05K3/07 ,  H05K3/107 ,  H05K1/0306 ,  H05K1/092 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/098 ,  H05K2201/09863 ,  H05K2201/2072 ,  H05K2203/0353 ,  H05K3/06 ,  H05K3/108

Abstract: A method of forming electrically conductive paths within grooves formed in a substrate wherein the width of the grooves is of the same order of magnitude as the thickness of an electrically conductive layer deposited on the substrate and in the grooves. The substrate with grooves therein is exposed to a medium whereby electrically conductive material from the medium deposits substantially uniformly on all surfaces of the substrate which are exposed to the medium. In this way, the build-up of conductive material in grooves will take place along the side walls as well as the bottom of the grooves. If the layer is of substantially the same order of magnitude as the width of the groove (about one half the groove width or greater), the grooves will fill up with conductive material. The remainder of the substrate will ultimately provide a substantially flat conductive layer on the substrate surface. The conductive material is then removed by an action which removes exposed conductor along the entire substrate surface at a uniform rate whereby the conductor will be substantially entirely removed from the substrate except for the portion thereof within the grooves. In this way an electrically conductive path of predetermined geometry is provided.

Abstract translation: 在衬底中形成的沟槽内形成导电路径的方法，其中沟槽的宽度与沉积在衬底和凹槽中的导电层的厚度相同数量级。 其中具有凹槽的衬底暴露于介质，由此来自介质的导电材料基本均匀地沉积在暴露于介质的衬底的所有表面上。 以这种方式，导电材料在槽中的积聚将沿着侧壁以及凹槽的底部发生。 如果该层与凹槽的宽度（槽宽度的大约一半）大致相同的数量级，则凹槽将填充导电材料。 衬底的其余部分将最终在衬底表面上提供基本平坦的导电层。 然后通过以均匀速率沿着整个基板表面去除暴露的导体的动作去除导电材料，由此导体将基本上完全从衬底除去，除了其中的凹槽内的部分。 以这种方式提供预定几何形状的导电路径。

公开(公告)号：US10076044B2

公开(公告)日：2018-09-11

申请号：US15027756

申请日：2014-09-24

Applicant: HITACHI CHEMICAL COMPANY, LTD.

Inventor： Nobuyuki Yoshida

IPC: H05K3/42 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K3/423 ,  H05K3/0026 ,  H05K3/0035 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09863 ,  H05K2201/2072 ,  H05K2203/1184 ,  H05K2203/1476 ,  H05K2203/1492

Abstract: The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole from a metal foil for an upper layer wiring pattern to an inner layer wiring pattern by using a conformal method or a direct laser method, and (2) a step of forming a via hole by forming electrolytic filling plating layers in the hole for a via hole, wherein the formation of the electrolytic filling plating layers in the step (2) is carried out by repeating change in electric current density of temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating and then increasing it again, two or more times before the electrolytic filling plating layers block an opening of the hole for a via hole.

公开(公告)号：US20140295697A1

公开(公告)日：2014-10-02

申请号：US14227574

申请日：2014-03-27

Applicant: Molex Incorporated

Inventor： Toshihiro NIITSU ,  Motohisa Haga

IPC: H01R12/52

CPC classification number: H01R12/523 ,  H01R12/79 ,  H05K1/117 ,  H05K3/326 ,  H05K3/365 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/0367 ,  H05K2201/09163 ,  H05K2201/0919 ,  H05K2201/09863 ,  H05K2201/10303 ,  H05K2201/10386

Abstract: A connector for a multilayered board to connect a flat cable to a middle layer of a multilayered board while minimizing the impact due to variations in the dimensional precision and strength of multilayered boards and/or preventing deformation of the multilayered board and improving contact stability. The connector includes a board-side connecting portion and a cable-side connecting portion. The board-side connecting portion includes a column-shaped terminal, and the cable-side connecting portion includes flat terminals. The column-shaped terminal protrudes from the middle layer of the multilayered board in the thickness direction. The flat terminals include resilient contact portions, contacting a side surface portion of the column-shaped terminal from the width direction of the insertion slot in response to insertion of the cable-side connecting portion into the insertion slot.

Abstract translation: 一种用于多层板的连接器，用于将扁平电缆连接到多层板的中间层，同时最小化由于多层板的尺寸精度和强度的变化引起的冲击和/或防止多层板的变形并提高接触稳定性。 连接器包括板侧连接部和电缆侧连接部。 板侧连接部包括柱状端子，电缆侧连接部包括扁平端子。 柱状端子在厚度方向从多层板的中间层突出。 扁平端子包括弹性接触部分，其响应于电缆侧连接部分插入到插槽中而从插入槽的宽度方向接触到柱状端子的侧表面部分。

公开(公告)号：US20120125680A1

公开(公告)日：2012-05-24

申请号：US13357663

申请日：2012-01-25

Applicant: Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H05K1/02 ,  C25D5/02 ,  B23K1/20 ,  B23K31/02 ,  H05K3/46 ,  C25D7/00

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以防止通孔的连接的可靠性。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US20080189943A1

公开(公告)日：2008-08-14

申请号：US12098582

申请日：2008-04-07

Applicant: Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H05K3/42 ,  H01L21/306

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口部20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US20080173473A1

公开(公告)日：2008-07-24

申请号：US11875486

申请日：2007-10-19

Applicant: Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H01R12/04

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口部20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US07328506B2

公开(公告)日：2008-02-12

申请号：US10281463

申请日：2002-10-25

Applicant: Miguel A. Jimarez ,  Ross W. Keesler ,  Voya R. Markovich ,  Rajinder S. Rai ,  Cheryl L. Tytran-Palomaki

Inventor： Miguel A. Jimarez ,  Ross W. Keesler ,  Voya R. Markovich ,  Rajinder S. Rai ,  Cheryl L. Tytran-Palomaki

IPC: H01K3/10

CPC classification number: H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H05K1/112 ,  H05K3/28 ,  H05K3/3457 ,  H05K3/3484 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/09863 ,  H05K2203/043 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A method for forming a plated microvia interconnect. An external dielectric layer (EDL) is mounted on a surface of the substrate and is in direct mechanical contact with a conductive element included in the surface. An opening formed in the EDL exposes the conductive element and creates a microvia in the EDL. A sidewall and bottom wall surface of the microvia is treated to promote copper adhesion to the sidewall and bottom wall surfaces. The sidewall and bottom wall surfaces are plated to form a layer of copper thereon. The layer of copper is in direct mechanical and electrical contact with the conductive element. A wet solder paste deposited on the layer of copper overfills a remaining portion of the microvia. The solder paste is reflowed to form a solder bump in and over the remaining portion of the microvia to form the plated microvia interconnect.

Abstract translation: 一种形成电镀微孔互连的方法。 外部电介质层（EDL）安装在基板的表面上，并且与包括在表面中的导电元件直接机械接触。 EDL中形成的开口露出导电元件，并在EDL中产生微孔。 处理微孔的侧壁和底壁表面以促进铜附着到侧壁和底壁表面。 侧壁和底壁表面被电镀以在其上形成一层铜层。 铜层与导电元件直接机械和电接触。 沉积在铜层上的湿焊膏过量填充微孔的剩余部分。 焊膏被回流以在微孔的剩余部分中和上方形成焊料凸块以形成电镀微孔互连。

公开(公告)号：US20070097154A1

公开(公告)日：2007-05-03

申请号：US11520667

申请日：2006-09-14

Applicant: Toshiya Kojima

Inventor： Toshiya Kojima

IPC: B41J2/01

CPC classification number: B41J2/161 ,  B41J2/14233 ,  B41J2/1637 ,  B41J2/1643 ,  B41J2002/14459 ,  B41J2002/14491 ,  B41J2202/18 ,  H05K1/0284 ,  H05K3/107 ,  H05K3/182 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09845 ,  H05K2201/09863 ,  H05K2201/2072

Abstract: The wiring board has electrical wires of a prescribed pattern. More specifically, the wiring board has a substrate on which grooves are formed in the prescribed pattern, each of the grooves having an undercut part; and a conductive material which is disposed inside the grooves so as to serve as the electrical wires.

Abstract translation: 布线板具有规定图案的电线。 更具体地说，布线板具有以规定图案形成有槽的基板，每个槽具有底切部; 以及设置在所述槽内部以用作所述电线的导电材料。