公开(公告)号：US20190244331A1

公开(公告)日：2019-08-08

申请号：US15887907

申请日：2018-02-02

Applicant: NVIDIA Corp.

Inventor： Jinwei Gu ,  Orazio Gallo ,  Ming-Yu Liu ,  Jan Kautz ,  Huaijin Chen

IPC: G06T5/00 ,  G06K9/46 ,  G06K9/66 ,  G06N3/08

Abstract: An image processing method extracts consecutive input blurry frames from a video, and generates sharp frames corresponding to the input blurry frames. An optical flow is determined between the sharp frames, and the optical flow is used to compute a per-pixel blur kernel. The blur kernel is used to reblur each of the sharp frames into a corresponding re-blurred frame. The re-blurred frame is used to fine-tune the deblur network by minimizing the distance between the re-blurred frame and the input blurry frame.

公开(公告)号：US20190229749A1

公开(公告)日：2019-07-25

申请号：US16124085

申请日：2018-09-06

Applicant: NVIDIA Corp.

Inventor： Sunil Sudhakaran ,  Russ Newcomb ,  Rohit Rathi

IPC: H03M5/14 ,  H03M5/08 ,  H03M7/46

Abstract: A PAM-4 communication process divides a full burst of raw data into two half bursts, extracts a bit from each half burst and communicating the extracted bit on a DBI line, and encodes the remaining bits of the half burst to avoid maximum transitions between PAM-4 symbols on a data line.

公开(公告)号：US20030233568A1

公开(公告)日：2003-12-18

申请号：US10172683

申请日：2002-06-13

Applicant: Nvidia Corp.

Inventor： Thomas Albert Maufer ,  Sameer Nanda ,  Paul J. Sidenblad

IPC: H04L009/00

CPC classification number: H04L63/0272 ,  H04L29/12018 ,  H04L29/12216 ,  H04L29/12367 ,  H04L29/12462 ,  H04L29/1249 ,  H04L61/10 ,  H04L61/2015 ,  H04L61/2514 ,  H04L61/255 ,  H04L61/256 ,  H04L63/0428 ,  H04L63/061 ,  H04L63/164 ,  H04L69/24

Abstract: Method and apparatus for enhanced security for communication over a network, and more particularly to control of security protocol negotiation to enable multiple clients to establish a virtual private network connection with a same remote address, is described. A mapping table accessible by a gateway computer is used to form associations between a local address for the client and a destination address for a peer and a Security Parameters Index associated with IPSec-protected traffic from the peer. When a packet is received at the gateway from a client it is checked to determine if it is an Internet Key Exchange (IKE) packet, whether an IKE session has already been recorded from this client in the mapping table for the destination address in the IKE packet, whether a Security Parameters Index has been observed in the clear from a remote computer associated with the destination address.

Abstract translation: 描述了用于通过网络进行通信的增强安全性的方法和装置，更具体地涉及安全协议协商的控制，以使得多个客户端能够建立具有相同远程地址的虚拟专用网络连接。 网关计算机可访问的映射表用于形成客户端的本地地址与对等体的目的地址之间的关联以及与来自对等体的受IPSec保护的流量相关联的安全参数索引。 当从客户端在网关接收到分组时，检查它是否是因特网密钥交换（IKE）分组，在IKE中的目的地址的映射表中是否已经从该客户端记录了IKE会话 分组，是否已经从与目的地址相关联的远程计算机的清除中观察到安全参数索引。

公开(公告)号：US20250156764A1

公开(公告)日：2025-05-15

申请号：US18947237

申请日：2024-11-14

Applicant: NVIDIA Corp.

Inventor： Tongzhou Mu ,  Yijie Guo ,  Jie Xu ,  Ankit Goyal ,  Animesh Garg ,  Dieter Fox

IPC: G06N20/00

Abstract: Mechanisms to enhance robotic agent performance utilizing dynamically curated demonstration trajectories to augment agent training, whereby additional demonstrations are dynamically curated or generated and added to the demonstration training set for the robot based on task difficulty and initial state complexity, thereby utilizing a greater number of training demonstrations for unsolved or poorly performing tasks and challenging initial states.

公开(公告)号：US12255675B2

公开(公告)日：2025-03-18

申请号：US17931472

申请日：2022-09-12

Applicant: NVIDIA Corp.

Inventor： Xi Chen ,  Yoshinori Nishi ,  John Poulton

IPC: H04B1/04 ,  H03H7/38 ,  H04B1/38

Abstract: A simultaneous bi-directional (SBD) transceiver includes a main transmit driver, a replica transmit driver, and a series-series-bridged (SSB) tri-impedance network. A pre-driver stage includes parallel delay paths for the main transmit driver and the replica transmit driver, enabling the delay for signals received by the main transmit driver and the replica transmit driver to be independently configured.

公开(公告)号：US20240420748A1

公开(公告)日：2024-12-19

申请号：US18336758

申请日：2023-06-16

Applicant: NVIDIA Corp.

Inventor： Cagri Erbagci ,  Burak Erbagci ,  Lalit Gupta ,  Jesse San-Jey Wang

IPC: G11C7/12 ,  G11C7/10

Abstract: Negative bit line voltage assist mechanisms for multi-bank machine memories utilizing multiple local IO drivers include a shared boost capacitor configured to generate a negative bit line voltage assist for write operations by local IO drivers, where the boost capacitor is configured to selectively couple to one of the local IO drivers during the write operation.

公开(公告)号：US12169677B2

公开(公告)日：2024-12-17

申请号：US17230592

申请日：2021-04-14

Applicant: NVIDIA Corp.

Inventor： Haoxing Ren ,  Matthew Rudolph Fojtik

IPC: G06F30/398 ,  G06F30/394 ,  G06N3/047 ,  G06N3/12

Abstract: A genetic algorithm is utilized to generate routing candidates to which a reinforcement learning model is applied to correct the design rule constraint violations incrementally. A design rule checker provides feedback on the violations to the reinforcement learning model and the model learns how to fix the violations. A layout device placer based upon a simulated annealing method may also be utilized.

公开(公告)号：US20240402740A1

公开(公告)日：2024-12-05

申请号：US18327666

申请日：2023-06-01

Applicant: NVIDIA Corp.

Inventor： Zhonghua Li ,  Wen-Hung Lo ,  Michael Ivan Halfen ,  Abhishek Dhir ,  Jaewon Lee ,  Jiwang Lee ,  CHUNJEN SU

IPC: G05F1/563 ,  G05F1/565 ,  G05F3/26

Abstract: Power supply circuits in which a supplemental current driver is utilized to boost the current provided by a voltage regulator. The supplementing driver detects operating conditions for providing the supplementary current, and may be trained to provide particular amounts of current in response to particular operation conditions of a circuit load.

公开(公告)号：US12131800B2

公开(公告)日：2024-10-29

申请号：US18056158

申请日：2022-11-16

Applicant: NVIDIA Corp.

Inventor： Mahmut Ersin Sinangil ,  Sudhir Shrikantha Kudva ,  Nikola Nedovic ,  Carl Thomas Gray

IPC: G11C7/24 ,  G11C7/10 ,  G11C7/20

CPC classification number: G11C7/24 ,  G11C7/1063 ,  G11C7/20

Abstract: PUF cells utilizing a dual-interlocking scheme demonstrating improved noise immunity and stability across different V/T conditions and different uses over time in noisy environments. The PUF cell may be advantageously utilized in conjunction with error detection techniques that screen out unstable cells. A set of such PUF cells utilized to generate a device-specific bit pattern, for example a master key.

公开(公告)号：US12099407B2

公开(公告)日：2024-09-24

申请号：US17737374

申请日：2022-05-05

Applicant: NVIDIA Corp.

Inventor： Michael Sullivan ,  Siva Kumar Sastry Hari ,  Brian Matthew Zimmer ,  Timothy Tsai ,  Stephen W. Keckler

IPC: G06F11/10 ,  G06F9/30 ,  G06F11/07

CPC classification number: G06F11/102 ,  G06F9/30029 ,  G06F9/30116 ,  G06F11/0772 ,  G06F11/1044

Abstract: An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.