公开(公告)号：KR1020150077737A

公开(公告)日：2015-07-08

申请号：KR1020130166516

申请日：2013-12-30

Applicant: 한국전자통신연구원

Inventor： 고상춘 ,  문재경 ,  장우진 ,  배성범 ,  박영락 ,  전치훈 ,  문석환 ,  장우영 ,  김정진 ,  장현규 ,  나제호 ,  남은수

IPC: H01L29/66 ,  H01L29/47 ,  H01L21/02 ,  H01L21/283 ,  H01L21/321 ,  H01L29/20 ,  H01L29/778

CPC classification number: H01L21/3212 ,  H01L21/0254 ,  H01L21/283 ,  H01L21/28575 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/475 ,  H01L29/778

Abstract: 본발명의질화물반도체소자의제조방법에관한것으로제 1 및제 2 질화물반도체층들이차례로적층된성장기판상에복수의전극들을형성하는것, 상기각각의전극들상에상부금속층들을형성하는것, 상기성장기판을제거하여상기제 1 질화물반도체층의하면을노출하는것 및상기노출된제 1 질화물반도체층의하면상에제 3 질화물반도체층및 하부금속층을차례로형성하는것을포함하는질화물반도체소자의제조방법이제공된다.

Abstract translation: 本发明涉及一种制造氮化物半导体器件的方法。 提供了一种制造氮化物半导体器件的方法，其包括在生长衬底上形成电极，其中连续堆叠第一和第二氮化物半导体层，在每个电极上形成上部金属层，将第一氮化物半导体层的下表面暴露于第一氮化物半导体层的下表面 去除生长衬底，以及在暴露的第一氮化物半导体层的下表面上形成第三氮化物半导体层和下金属层。

公开(公告)号：KR1020140091093A

公开(公告)日：2014-07-21

申请号：KR1020120152409

申请日：2012-12-24

Applicant: 한국전자통신연구원

Inventor： 배성범 ,  김성복 ,  문재경 ,  남은수

IPC: H01L21/02 ,  H01L21/32

CPC classification number: H01L21/0254 ,  H01L21/02458 ,  H01L21/02496 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/32 ,  H01L21/02389

Abstract: Disclosed is a method for manufacturing a semiconductor substrate. The method includes a step of forming a blocking pattern which surrounds the edge of a substrate, a step of forming a relaxation layer on the front surface of the substrate except for the blocking pattern, and a step of forming an epi semiconductor layer on the blocking pattern and the relaxation layer. Here, the epi semiconductor layer is not grown on the blocking pattern and gradually covers the blocking pattern by a selective isotropy growth method by which the epi semiconductor layer is isotropically grown on the sidewall and the upper part of the relaxation layer.

Abstract translation: 公开了半导体基板的制造方法。 该方法包括形成围绕衬底边缘的阻挡图案的步骤，除了阻挡图案之外在衬底的前表面上形成弛豫层的步骤，以及在阻挡层上形成外延半导体层的步骤 图案和松弛层。 这里，外延半导体层不是在阻挡图案上生长，并且通过选择性各向同性生长方法逐渐覆盖阻挡图案，通过该方法，外延半导体层在弛豫层的侧壁和上部上各向同性地生长。

公开(公告)号：KR1020140080750A

公开(公告)日：2014-07-01

申请号：KR1020120146827

申请日：2012-12-14

Applicant: 한국전자통신연구원

Inventor： 주철원 ,  윤형섭 ,  임종원 ,  이상흥 ,  김성일 ,  강동민 ,  남은수 ,  문재경

IPC: G01R31/26

CPC classification number: G01R1/0466 ,  G01R1/0458

Abstract: According to an embodiment of the present invention, a semiconductor device testing apparatus comprises a first socket accommodating a package on which a semiconductor device to be tested is mounted; and a second socket coupled to the first socket. The first socket includes an upper part having a hole accommodating the package and a terminal pad formed at both side ends of the hole to hold input and output terminals of the package; and a lower part having a heating room, which accommodates a heater to heat the semiconductor device, and a temperature sensing part for measuring the temperature of the semiconductor device in the heating room. The second socket comprises a probe card with a pattern to receive a test signal from an external power source.

Abstract translation: 根据本发明的一个实施例，一种半导体器件测试装置包括容纳封装的第一插座，其上安装有要测试的半导体器件; 以及耦合到第一插座的第二插座。 第一插座包括具有容纳封装的孔的上部和形成在孔的两个侧端处以保持封装的输入和输出端子的端子焊盘; 以及具有加热室的下部，其容纳用于加热半导体器件的加热器，以及用于测量加热室中的半导体器件的温度的温度检测部。 第二插座包括具有从外部电源接收测试信号的模式的探针卡。

公开(公告)号：KR1020140076110A

公开(公告)日：2014-06-20

申请号：KR1020120144273

申请日：2012-12-12

Applicant: 한국전자통신연구원

Inventor： 고상춘 ,  문재경 ,  민병규 ,  박영락 ,  안호균 ,  김정진 ,  남은수

IPC: H01L21/78 ,  H01L21/301

CPC classification number: H01L29/808 ,  H01L21/76898 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/432 ,  H01L29/454 ,  H01L29/66462 ,  H01L29/7786

Abstract: A semiconductor device and a method for manufacturing the same are provided. The method for manufacturing the semiconductor device comprises the steps of: forming devices including a source electrode, a drain electrode and a gate electrode on a front surface of a substrate including a bulk silicon, a buried oxide layer, an active silicon, a gallium nitride layer, and an aluminum-gallium nitride layer sequentially stacked; etching a back surface of the substrate to form a via-hole penetrating the substrate and exposing a bottom surface of the source electrode; conformally forming a ground interconnection on the back surface of the substrate having the via-hole; forming a protective layer on the front surface of the substrate; and cutting the substrate to separate the devices from each other.

Abstract translation: 提供半导体器件及其制造方法。 制造半导体器件的方法包括以下步骤：在包括体硅，掩埋氧化物层，活性硅，氮化镓的衬底的前表面上形成包括源电极，漏电极和栅电极的器件 层和依次层叠的氮化铝镓层; 蚀刻所述基板的背面以形成穿透所述基板的通孔并暴露所述源电极的底表面; 在具有通孔的基板的背面上共形地形成接地互连; 在所述基板的前表面上形成保护层; 并切割基板以将装置彼此分开。

公开(公告)号：KR1020140019984A

公开(公告)日：2014-02-18

申请号：KR1020120086230

申请日：2012-08-07

Applicant: 한국전자통신연구원

Inventor： 민봉기 ,  오명숙 ,  김기수 ,  심재식 ,  권용환 ,  남은수

IPC: H01L31/107

CPC classification number: H01L31/18 ,  H01L31/02002 ,  H01L31/035272 ,  H01L31/107

Abstract: The present invention relates to an avalanche photodiode having a guard ring structure for reducing edge-breakdown thanks to an external voltage applied through a metal pad attached on the guard ring and a manufacturing method thereof. The avalanche photodiode having a guard ring structure includes: a plurality of semiconductor layers which are stacked on a substrate; an active area which is formed on part of the top of the semiconductor layers; a guard ring which is formed on the top of the semiconductor layers, is separated from the active area, and has a ring shape surrounding the active area; and a connection unit which is formed on the top of the semiconductor layers and is connected to the guard ring to apply an external voltage onto the guard ring. Therefore, the external voltage is applied onto the guard ring of the avalanche diode through the connection unit so that edge-breakdown can be reduced.

Abstract translation: 本发明涉及一种具有保护环结构的雪崩光电二极管及其制造方法，该保护环结构用于通过附着在防护环上的金属焊盘施加的外部电压来减少边缘击穿。 具有保护环结构的雪崩光电二极管包括：层叠在基板上的多个半导体层; 形成在半导体层顶部的一部分上的有源区; 形成在半导体层顶部的保护环与有源区分离，并且具有围绕有源区的环形形状; 以及连接单元，其形成在所述半导体层的顶部并连接到所述保护环，以将外部电压施加到所述保护环上。 因此，通过连接单元将外部电压施加到雪崩二极管的保护环上，从而可以减少边缘击穿。

公开(公告)号：KR1020140010479A

公开(公告)日：2014-01-27

申请号：KR1020120075571

申请日：2012-07-11

Applicant: 한국전자통신연구원

Inventor： 윤형섭 ,  민병규 ,  임종원 ,  안호균 ,  이종민 ,  김성일 ,  문재경 ,  남은수

IPC: H01L21/336 ,  H01L29/778

CPC classification number: H01L21/28008 ,  H01L21/28587 ,  H01L29/42316 ,  H01L29/66863

Abstract: The present invention relates to a method for manufacturing a high performance field effect type compound semiconductor device in which a leakage current is decreased and breakdown voltage is improved. The method for manufacturing field effect type compound semiconductor device comprises the following steps of: stacking an active layer and an ohmic layer on a substrate and forming a first oxide layer on the ohmic layer; forming a mesa area vertically in predetermined areas of the first oxide layer, ohmic layer, and active layer; flattening the mesa area after forming a nitride layer by depositing a nitride film on the mesa area; forming an ohmic electrode on the first oxide layer; forming a macro-gate pattern having an under-cut shaped profile by forming a second oxide layer on the semiconductor substrate on which the ohmic electrode is formed, forming a micro-gate resist pattern, and performing dry-etching for three insulating layers including the first oxide layer, nitride layer, and second oxide layer; forming a gate recess area by applying a copolymer resist over the semiconductor substrate on which the micro-gate pattern is formed and forming a head pattern of a gamma gate electrode; and forming a gamma gate electrode by depositing a refractory metal on the semiconductor substrate on which the gate recess area is formed.

Abstract translation: 本发明涉及一种制造泄漏电流降低并提高击穿电压的高性能场效应型化合物半导体器件的方法。 制造场效应型化合物半导体器件的方法包括以下步骤：在衬底上堆叠有源层和欧姆层，并在欧姆层上形成第一氧化物层; 在第一氧化物层，欧姆层和有源层的预定区域中垂直形成台面区域; 通过在台面区域上沉积氮化物膜，在形成氮化物层之后使台面区域变平; 在所述第一氧化物层上形成欧姆电极; 通过在其上形成欧姆电极的半导体衬底上形成第二氧化物层，形成具有底切形状的宏栅图形，形成微栅抗蚀剂图案，并且对包括第二氧化物层的三个绝缘层进行干法蚀刻 第一氧化物层，氮化物层和第二氧化物层; 通过在其上形成微栅极图案的半导体衬底上施加共聚物抗蚀剂并形成伽马栅电极的头部图案，形成栅极凹部区域; 以及通过在其上形成有所述栅极凹部区域的所述半导体衬底上沉积难熔金属来形成γ栅电极。

公开(公告)号：KR1020130139162A

公开(公告)日：2013-12-20

申请号：KR1020130051216

申请日：2013-05-07

Applicant: 한국전자통신연구원

Inventor： 권용환 ,  민봉기 ,  오명숙 ,  심재식 ,  김기수 ,  남은수

IPC: G01S17/89 ,  G01S17/02

Abstract: Provided is a focal plane array (FPA) module capable of improving the quality of an obtained three-dimensional image by adjusting the interval and size of an array of optical detectors in the FPA module for obtaining a three-dimensional image. The FPA module for obtaining a three-dimensional image according to an embodiment of the present invention comprises multiple optical detectors which detect light reflected from a monitored object, wherein the multiple optical detectors are arranged at different intervals according to the location of the optical detectors.

Abstract translation: 提供了一种焦平面阵列（FPA）模块，其能够通过调整FPA模块中的光学检测器阵列的间隔和尺寸来获得三维图像来提高所获得的三维图像的质量。 根据本发明实施例的用于获得三维图像的FPA模块包括检测从被监视对象反射的光的多个光学检测器，其中根据光学检测器的位置以不同的间隔布置多个光学检测器。

公开(公告)号：KR1020130126840A

公开(公告)日：2013-11-21

申请号：KR1020120047360

申请日：2012-05-04

Applicant: 한국전자통신연구원

Inventor： 주철원 ,  김해천 ,  윤형섭 ,  장우진 ,  이상흥 ,  김동영 ,  임종원 ,  강동민 ,  안호균 ,  이종민 ,  남은수

IPC: H01L23/48 ,  H01L23/34

CPC classification number: H01L29/2003 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L29/41758 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7787 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/06135 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/00014

Abstract: The present invention relates to a GaN (gallium nitride)-based compound power semiconductor device and a manufacturing method thereof. The gallium nitride-based compound power semiconductor device comprises a gallium nitride-based compound element growing on a wafer; a contact pad including a source, a drain and a gate on the gallium nitride-based compound element; a module substrate to which the gallium nitride-based compound element is bonded with a flip chip; a bonding pad formed on the module substrate; and a bump formed on the bonding pad of the module substrate to bond the contact pad and the bonding pad with the flip chip. According to the present invention, processing costs are low by forming the bump on the substrate with a front process (wafer level). According to the present invention, heat generated in an AlGaN HEMT element is quickly discharged becuase a subsource contact pad and subdrain contact pad of the substrate is formed on the substrate. According to the present invention, the heat generated in the AlGaN HEMT element is effectively discharged by forming a via hole on the substrate and filling the via hole with conductive metal.

Abstract translation: 本发明涉及一种GaN（氮化镓））复合功率半导体器件及其制造方法。 氮化镓基复合功率半导体器件包括在晶片上生长的氮化镓基化合物元素; 接触焊盘，其包括在所述氮化镓基复合元件上的源极，漏极和栅极; 所述氮化镓系复合元件与倒装芯片接合的模块基板; 形成在所述模块基板上的焊盘; 以及形成在模块基板的焊盘上的凸块，以将接触焊盘和焊盘与倒装芯片接合。 根据本发明，通过用前处理（晶片级）在基板上形成凸块来加工成本低。 根据本发明，在AlGaN HEMT元件中产生的热量由于子源接触焊盘而快速放电，并且在衬底上形成衬底的亚临界接触焊盘。 根据本发明，通过在基板上形成通孔并用导电金属填充通孔来有效地排出在AlGaN HEMT元件中产生的热量。

公开(公告)号：KR1020130071748A

公开(公告)日：2013-07-01

申请号：KR1020110139142

申请日：2011-12-21

Applicant: 한국전자통신연구원

Inventor： 강동민 ,  임종원 ,  이상흥 ,  윤형섭 ,  주철원 ,  문재경 ,  남은수

IPC: H04B1/06

CPC classification number: H04B1/18 ,  H03F1/26 ,  H03F2200/294

Abstract: PURPOSE: A multi-channel beam scan receiver is provided to include a multi-channel antenna in a single substrate. CONSTITUTION: A switch (103) selects one of plurality of signals received through a multi-channel antenna. A first low-noise amplifier (105) firstly amplifies a signal selected in the switch. A band-pass filter (107) filters the firstly amplified signal. A second low-noise amplifier (109) secondly amplifies the filtered signal. A detector (111) converts the secondly amplified signal into voltage. [Reference numerals] (101) Multi-channel antenna; (103) Switch; (105) First low-noise amplifier; (107) Band-pass filter; (109) Second low-noise amplifier; (111) Detector; (115) DC amplifier

Abstract translation: 目的：提供多通道光束扫描接收器，以在单个基板中包括多通道天线。 构成：开关（103）选择通过多通道天线接收的多个信号中的一个。 第一低噪声放大器（105）首先放大在开关中选择的信号。 带通滤波器（107）对第一放大信号进行滤波。 第二低噪声放大器（109）二次放大经滤波的信号。 检测器（111）将第二放大信号转换为电压。 （附图标记）（101）多声道天线; （103）开关; （105）第一低噪声放大器; （107）带通滤波器; （109）第二低噪声放大器; （111）检测器; （115）直流放大器

公开(公告)号：KR1020130068156A

公开(公告)日：2013-06-26

申请号：KR1020110134352

申请日：2011-12-14

Applicant: 한국전자통신연구원

Inventor： 윤천주 ,  최중선 ,  김종회 ,  김덕준 ,  권용환 ,  남은수

IPC: G01J3/45 ,  G01R31/00

CPC classification number: H04B10/614 ,  H04B10/0799

Abstract: PURPOSE: A device for measuring the performance of a coherent light receiver is provided to measure a common mode removal rate directly and accurately. CONSTITUTION: A device for measuring the performance of a coherent light receiver comprises a beam splitter(210), a first optical modulator(221), a variable optical attenuator(230), a second optical modulator(222), a variable optical retarder(240), a first polarization controller, a second polarization controller(252), a network analyzer(260), and a controller(270). The beam splitter splits lights received from a light source into first and second route lights. The first optical modulator receives the first route lights of the beam splitter and performs optical modulation. The variable optical attenuator controls the optical power of the output of the first optical modulator, thereby outputting. The first polarization controller transmits first output signals in which the polarization of the output of the variable optical attenuator is controlled to a coherent light receiver. The second optical modulator receives the second route lights of the beam splitter. The variable optical retarder outputs the output of the second optical modulator by delaying the time of the output of the second optical modulator. [Reference numerals] (210) Beam splitter; (221) First optical modulator; (222) Second optical modulator; (230) Variable optical attenuator; (240) Variable optical retarder; (251) First polarization controller; (252) Second polarization controller; (260) Network analyzer; (270) Controller; (AA) Electric signal

Abstract translation: 目的：提供一种用于测量相干光接收机性能的设备，用于直接和准确地测量共模移除速率。 构成：用于测量相干光接收机的性能的装置包括分束器（210），第一光调制器（221），可变光衰减器（230），第二光调制器（222），可变光延迟器 240），第一偏振控制器，第二偏振控制器（252），网络分析器（260）和控制器（270）。 分束器将从光源接收的光分成第一和第二路线灯。 第一光调制器接收分束器的第一路由光并执行光调制。 可变光衰减器控制第一光调制器的输出的光功率，从而输出。 第一偏振控制器传输第一输出信号，其中可变光衰减器的输出的极化被控制到相干光接收器。 第二光调制器接收分束器的第二路灯。 可变光学延迟器通过延迟第二光学调制器的输出时间来输出第二光学调制器的输出。 （附图标记）（210）分束器; （221）第一光调制器; （222）第二光调制器; （230）可变光衰减器; （240）可变光学延迟器; （251）第一偏振控制器; （252）第二偏振控制器; （260）网络分析仪; （270）控制器; （AA）电信号