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公开(公告)号：KR100761706B1
公开(公告)日：2007-09-28
申请号：KR1020060085789
申请日：2006-09-06
Applicant: 삼성전기주식회사
IPC: H05K3/42
CPC classification number: H05K3/0017 , H05K3/0014 , H05K3/045 , H05K3/06 , H05K3/107 , H05K3/20 , H05K3/205 , H05K3/426 , H05K3/4614 , H05K3/465 , H05K3/4658 , H05K2201/0361 , H05K2201/0376 , H05K2201/09036 , H05K2201/09563 , H05K2203/0278 , H05K2203/0384 , H05K2203/0582 , H05K2203/1152 , H05K2203/1189 , H05K2203/308 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
Abstract: A manufacturing method of a PCB(Printed Circuit Board) is provided to reduce manufacturing cost and improve efficiency due to forming minute circuit with high definition by using instruments used for an existing PCB. A manufacturing method of a PCB includes the steps of: laminating an insulating layer(15) on at least one surface of a core layer(11) with an inner circuit(13), and forming an external circuit pattern(17); impregnating the external circuit pattern(17) in the insulating layer(15); removing the external circuit pattern(17), forming a minute groove, and hardening the insulating layer(15); and filling the minute groove with metal, and forming an external circuit.
Abstract translation: 提供PCB（印刷电路板）的制造方法，以通过使用用于现有PCB的仪器，以高清晰度形成微电路，从而降低制造成本并提高效率。 PCB的制造方法包括以下步骤：在芯层（11）的至少一个表面上与内部电路（13）层叠绝缘层（15），形成外部电路图案（17）。 浸渍绝缘层（15）中的外部电路图案（17）; 去除外部电路图案（17），形成微小凹槽，并硬化绝缘层（15）; 并用金属填充微槽，形成外部电路。
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公开(公告)号：KR100455891B1
公开(公告)日：2004-11-06
申请号：KR1020020083609
申请日：2002-12-24
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K1/162 , H05K3/0023 , H05K3/429 , H05K3/4652 , H05K3/4661 , H05K2201/0187 , H05K2201/0209 , H05K2203/0568 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155
Abstract: Disclosed herein are a printed circuit board with embedded capacitors therein and a process for manufacturing the printed circuit board. The embedded capacitors are formed by applying a photosensitive insulating resin to a printed circuit board inner layer, and applying a high dielectric polymer capacitor paste thereto. The process for manufacturing a printed circuit board with embedded capacitors therein comprises the steps of: i) laminating photo resist dry films to a copper clad FR-4, exposing to light and developing the dry films, and etching copper foils of the copper clad FR-4 to form bottom electrodes for forming capacitors; ii) applying a photosensitive insulating resin to the surfaces of the bottom electrodes, and exposing to light and developing to etch the photosensitive insulating resin; iii) applying a capacitor paste to the etched regions and curing the capacitor paste; iv) plating the upper regions of the cured capacitor paste and the photosensitive insulating resin using an electroless copper plating process to form copper foil layers for top electrodes; v) laminating photosensitive dry films to the copper foil layers for top electrodes, and exposing to light and developing the photosensitive dry films to etch regions of the dry films except for the copper foil layers where the top electrodes are to be formed; and vi) etching the regions of the dry films except for the copper foil layers where the top electrodes are to be formed, and the dry films formed on the top electrodes are removed so that the capacitor paste is discretely positioned between the top electrodes and the bottom electrodes to form discrete capacitors.
Abstract translation: 本文公开了一种其中具有嵌入式电容器的印刷电路板以及用于制造印刷电路板的工艺。 嵌入式电容器通过将感光性绝缘树脂涂布到印刷电路板内层，并将高介电聚合物电容器糊剂施加到其上而形成。 制造其中嵌入电容器的印刷电路板的方法包括以下步骤：i）将光致抗蚀剂干膜层压到覆铜箔FR-4上，曝光并显影干膜，并蚀刻铜箔FR的铜箔 -4以形成用于形成电容器的底部电极; ii）将光敏绝缘树脂施加到下电极的表面上，并且曝光和显影以蚀刻光敏绝缘树脂; iii）将电容器浆料施加到蚀刻区域并固化电容器浆料; iv）使用无电镀铜工艺对固化的电容器浆料和光敏绝缘树脂的上部区域进行电镀以形成用于顶部电极的铜箔层; v）将光敏干膜层压到用于顶部电极的铜箔层上，并曝光和显影光敏干膜以蚀刻除了要形成顶电极的铜箔层之外的干膜部分; 和vi）蚀刻除了要形成顶电极的铜箔层之外的干膜区域，并且去除形成在顶电极上的干膜，使得电容器浆料离散地位于顶电极和 底部电极以形成分立电容器。
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公开(公告)号：KR1020040056445A
公开(公告)日：2004-07-01
申请号：KR1020020082648
申请日：2002-12-23
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K1/162 , H05K3/4652 , H05K2201/0187 , H05K2201/0209 , H05K2201/0355 , H05K2201/0358 , H05K2201/09509 , H05K2203/1461
Abstract: PURPOSE: A printed circuit board with embedded capacitors, and a manufacturing process thereof are provided to reduce loss of raw materials and simplify a manufacturing cost by filling up a paste into a desired part. CONSTITUTION: A plurality of inner via-holes are formed at a predetermined part of a non-copper foil laminate(101). The inner via-holes are filled up by a capacitor paste(103). A plurality of copper foil layers are formed on a top part and a bottom part of the capacitor paste. A dry film pattern is formed on the copper foil layers. A top electrode(108a), a bottom electrode(108b), and a signal circuit pattern(109) are formed by exposing and developing the dry film. A resin-coated copper layer(110) is formed on the predetermined region including the top electrode, the bottom electrode, and the signal circuit pattern. An outer via-hole(111) and a through-hole(112) are formed on an insulating layer and the copper-foil layer. A plating process for each inner wall of the outer via-hole and the through-hole is performed.
Abstract translation: 目的：提供具有嵌入式电容器的印刷电路板及其制造方法，以减少原材料的损耗，并通过将浆料填充到期望的部分来简化制造成本。 构成：在非铜箔层叠体（101）的规定部分形成有多个内通路孔。 内部的通孔由电容器糊（103）填充。 在电容器糊的顶部和底部形成多个铜箔层。 在铜箔层上形成干膜图案。 通过曝光和显影干膜形成顶部电极（108a），底部电极（108b）和信号电路图案（109）。 在包括顶电极，底电极和信号电路图案的预定区域上形成树脂涂覆的铜层（110）。 在绝缘层和铜箔层上形成外部通孔（111）和通孔（112）。 对外部通孔和通孔的每个内壁进行电镀处理。
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公开(公告)号：KR100905566B1
公开(公告)日：2009-07-02
申请号：KR1020070042002
申请日：2007-04-30
Applicant: 삼성전기주식회사
IPC: H05K3/00
CPC classification number: H05K3/428 , H05K3/205 , H05K3/383 , H05K3/384 , H05K3/4602 , H05K3/4658 , H05K2201/0394 , H05K2201/09563 , H05K2203/1536 , Y10T29/49155
Abstract: 본 발명은 회로 전사용 캐리어 부재, 이를 이용한 코어리스 인쇄회로기판, 및 이들의 제조방법에 관한 것으로서, 캐리어층의 일면에 베리어층과, 외측 상단에만 요철이 형성되어 있는 회로 패턴을 갖도록 구성된 회로 전사용 캐리어 부재를 이용하여 회로 패턴을 수지 절연층에 전사하여 매립함으로써 고밀도, 고신뢰도의 코어리스 인쇄회로기판을 제작할 수 있다.
회로 전사용 캐리어, 코어리스, 인쇄회로기판, 베리어층, 절연층-
Patent Agency Ranking
公开(公告)号：KR1020080096985A
公开(公告)日：2008-11-04
申请号：KR1020070042002
申请日：2007-04-30
Applicant: 삼성전기주식회사
IPC: H05K3/00
CPC classification number: H05K3/428 , H05K3/205 , H05K3/383 , H05K3/384 , H05K3/4602 , H05K3/4658 , H05K2201/0394 , H05K2201/09563 , H05K2203/1536 , Y10T29/49155
Abstract: A carrier member for transferring circuits, a coreless printed circuit board using the same, and methods for manufacturing the same minimize damage to circuits and improve reliability of the printed circuit board by forming a concavo-convex only in the bottom of an inner side of a circuit pattern. A carrier plate composed of a carrier layer(302a, 302b) and a barrier layer(303a, 303b) on both sides of thermal adhesive representing non-adhesive property in a thermal process is attached to both sides carrier structure. The barrier layer is the metal seed layer except copper. A plating resist is coated on the part including lands or the part except for the circuit formation part which does not include the lands, on the barrier layer of the both sides carrier structure. The circuit pattern is formed by electro copper plating the opened circuit formation part through the plating resist. The concavo-convex part is formed by roughing an exposed surface of the circuit pattern. A pair of carrier members for transferring circuits is obtained and separated from the thermal adhesive by removing the plating resist and thermal treating both sides carrier structure.
Abstract translation: 用于传送电路的载体构件，使用其的无芯无线印刷电路板及其制造方法使对电路的损害最小化，并且仅通过在内侧的底部形成凹凸来提高印刷电路板的可靠性 电路图案。 在热处理中代表非粘合性的热粘合剂两侧的载体层（302a，302b）和阻挡层（303a，303b）构成的载体板被安装在两侧载体结构上。 阻挡层是铜以外的金属种子层。 在两面载体结构的阻挡层上，在包括焊盘或除了不包括焊盘的电路形成部分的部分之外的部分上涂覆电镀抗蚀剂。 电路图案是通过电镀抗蚀剂对开路形成部分进行电镀铜而形成的。 凹凸部通过粗糙化电路图案的露出表面而形成。 通过去除电镀抗蚀剂和热处理双面载体结构，获得用于转移电路的一对载体构件并与热粘合剂分离。
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公开(公告)号：KR100836654B1
公开(公告)日：2008-06-10
申请号：KR1020060100996
申请日：2006-10-17
Applicant: 삼성전기주식회사
IPC: H05K3/12
Abstract: 인쇄회로기판 제조방법이 제공된다.
절연층과 회로패턴을 포함하는 인쇄회로기판을 잉크를 이용하여 제조하는 방법으로서, 절연층에 상응하도록 절연성을 갖는 제1 잉크를 선택적으로 도포하는 제1 헤드; 및 회로패턴에 상응하도록 금속을 포함하는 제2 잉크를 선택적으로 도포하는 제2 헤드, 도포된 잉크를 경화시키는 경화부를 포함하는 인쇄회로기판 제조방법은 하나의 장비만으로 인쇄회로기판을 완성한다는 점에서 공정이 단순하고, 비용이 절감되며, 한번에 매우 얇은 두께로 도포함으로써 건조 혹은 경화시간이 매우 빠르고, 반복하여 형성한 회로패턴의 모서리를 원하는 형상대로 각을 잘 유지할 수 있으며, 에칭이나 도금공정이 없어 부산 폐기물도 적어 친환경적이다.
절연성, 전도성, 경화-
公开(公告)号：KR100792352B1
公开(公告)日：2008-01-08
申请号：KR1020060063633
申请日：2006-07-06
Applicant: 삼성전기주식회사
IPC: H01L23/12
CPC classification number: H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06541 , H01L2225/06568 , H01L2225/06586 , H01L2225/1058 , H01L2924/00014 , H01L2924/01078 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A bottom substrate of a POP(Package On Package) and a method of manufacturing the same are provided to increase the number of integrated circuits mounted thereon without increasing a size of a solder ball. A bottom substrate of a POP is electrically connected to a top substrate by using a solder ball. The bottom substrate includes a core substrate(10), a solder ball pad(12) formed on a surface of the core substrate corresponding to a position of the solder ball, an insulating layer(20) stacked on the core substrate, a through-hole formed by removing a solder ball pad part from the insulating layer to expose the solder ball pad, and a metal layer(28) for filling up the through-hole. The metal layer is electrically connected to the solder ball. The insulating layer is formed by stacking photoresist on the core substrate and hardening the photoresist.
Abstract translation: 提供POP（封装封装）的底部基板及其制造方法以增加其上安装的集成电路的数量，而不增加焊球的尺寸。 POP的底部基板通过使用焊球与顶部基板电连接。 底部基板包括芯基板（10），形成在对应于焊球位置的芯基板的表面上的焊球垫（12），堆叠在芯基板上的绝缘层（20） 通过从绝缘层去除焊球焊盘部分以暴露焊球焊盘而形成的孔，以及用于填充通孔的金属层（28）。 金属层电连接到焊球。 绝缘层通过在芯基板上堆叠光致抗蚀剂并使光致抗蚀剂硬化而形成。
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公开(公告)号：KR1020060116515A
公开(公告)日：2006-11-15
申请号：KR1020050038949
申请日：2005-05-10
Applicant: 삼성전기주식회사
CPC classification number: H01L24/18 , H01L24/82 , H01L2224/16225 , H01L2224/18 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01015 , H01L2924/01016 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H05K1/188 , H05K3/429 , H05K3/4602 , H05K2201/0355 , H05K2201/09536 , H05K2201/0959 , H01L2924/00 , H01L2224/0401
Abstract: A manufacturing method of a PCB(Printed Circuit Board) with embedded electronic components is provided to detect defects at an early stage by performing a defect detecting process after mounting the electronic components. A manufacturing method of a PCB with embedded electronic components(320) includes the steps of: a first step of mounting the electronic component(320) on one side of a first metal film(310a); a second step of aligning in order of stacked material and a second metal film on one side where the electronic component(320) of the first metal film(310a) is mounted; a third step of forming a core layer by pressing the first metal film(310a), stacking material, and second metal film; and forming a circuit pattern on the first metal film(310a) and the second metal film.
Abstract translation: 提供了具有嵌入式电子部件的PCB（印刷电路板）的制造方法，以便在安装电子部件之后，通过进行缺陷检测处理来早期检测缺陷。 具有嵌入式电子部件（320）的PCB的制造方法包括以下步骤：将电子部件（320）安装在第一金属膜（310a）的一侧的第一工序; 在第一金属膜（310a）的电子部件（320）的一侧安装有层叠材料和第二金属膜的顺序的第二工序; 通过按压第一金属膜（310a），堆叠材料和第二金属膜形成芯层的第三步骤; 以及在所述第一金属膜（310a）和所述第二金属膜上形成电路图案。
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公开(公告)号：KR100632559B1
公开(公告)日：2006-10-11
申请号：KR1020040115154
申请日：2004-12-29
Applicant: 삼성전기주식회사
IPC: H05K3/18
Abstract: 본 발명은 인쇄회로기판 및 그 제조 방법에 관한 것이다. 보다 구체적으로, 본 발명은 IC 패키지 기판으로 사용되는 인쇄회로기판 및 그 제조방법에 관한 것으로서, 인쇄회로기판의 외층에 노출된 동박에 니켈 등의 금속을 도금함으로써, 종래에 인쇄회로기판의 외부에 도포되던 솔더 레지스트를 대체함으로써 IC 패키지용 기판의 제조 비용 절감하고 솔더 레지스트 도포 시의 단점을 해소할 수 있는 인쇄회로기판 구조 및 그 제조 방법에 관한 것이다.
솔더 레지스트, 니켈 도금, 외층 회로 보호
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