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    INTEGRATED CAPACITIVE AND INDUCTIVE POWER SOURCES FOR A PLASMA ETCHING CHAMBER
    22.
    发明专利
    INTEGRATED CAPACITIVE AND INDUCTIVE POWER SOURCES FOR A PLASMA ETCHING CHAMBER 未知

    公开(公告)号：SG170030A1

    公开(公告)日：2011-04-29

    申请号：SG2011013406

    申请日：2007-02-16

    Applicant: LAM RES CORP

    Inventor： DHINDSA RAJINDER ,  SRINIVASAN MUKUND ,  TAKESHITA KENJI ,  MARAKHTANOV ALEXEI ,  FISCHER ANDREAS

    Abstract: Broadly speaking, the present invention fills these needs by providing an improved chamber cleaning mechanism. The present invention can also be used to provide additional knobs to tune the etch processes. In one embodiment, a plasma processing chamber configured to generate a plasma includes a bottom electrode assembly with an bottom electrode, wherein the bottom electrode is configured to receive a substrate. The plasma processing chamber includes a top electrode assembly with a top electrode and an inductive coil surrounding the top electrode. The inductive coil is configured to convert a gas into a plasma within a region defined within the chamber, wherein the region is outside an area defined above a top surface of the bottom electrode. Figure 1A

    23.
    发明专利
    未知

    公开(公告)号：DE60128229D1

    公开(公告)日：2007-06-14

    申请号：DE60128229

    申请日：2001-06-26

    Applicant: LAM RES CORP

    Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

    IPC: H05H1/00 ,  H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065

    Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

    METHOD FOR REPAIRING LOW-K DIELECTRIC DAMAGE
    24.
    发明专利
    METHOD FOR REPAIRING LOW-K DIELECTRIC DAMAGE 未知

    公开(公告)号：SG10201406202TA

    公开(公告)日：2014-11-27

    申请号：SG10201406202T

    申请日：2010-10-20

    Applicant: LAM RES CORP

    Inventor： SIRARD STEPHEN M ,  TAKESHITA KENJI ,  BAILEY III ANDREW D

    Abstract: A method for repairing damage to a silicon based low-k dielectric layer with organic compounds, where damage replaces a methyl attached to silicon with a hydroxyl attached to silicon is provided. A repair gas comprising CH4 gas is provided. The repair gas is formed into a plasma, while maintaining a pressure below 50 mTorr. Hydroxyl attached to silicon is replaced with methyl from the plasma formed by the repair gas.

    Vacuum plasma processor apparatus and method
    26.
    发明专利
    Vacuum plasma processor apparatus and method 未知

    公开(公告)号：AU7016301A

    公开(公告)日：2002-01-14

    申请号：AU7016301

    申请日：2001-06-26

    Applicant: LAM RES CORP

    Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

    IPC: H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065 ,  H05H1/00

    Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

    27.
    发明专利
    未知

    公开(公告)号：AT475985T

    公开(公告)日：2010-08-15

    申请号：AT01920490

    申请日：2001-03-16

    Applicant: LAM RES CORP

    Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK ,  COLLISON WENLI

    IPC: H01L21/3213 ,  H05H1/46 ,  H01J37/32 ,  H01L21/3065

    Abstract: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

    SELECTIVITY CONTROL IN A PLASMA PROCESSING SYSTEM
    28.
    发明专利
    SELECTIVITY CONTROL IN A PLASMA PROCESSING SYSTEM 未知

    公开(公告)号：IL176466A

    公开(公告)日：2010-05-31

    申请号：IL17646606

    申请日：2006-06-21

    Applicant: LAM RES CORP ,  TAKESHITA KENJI ,  TURMEL ODETTE ,  KOZAKEVICH FELIX ,  HUDSON ERIC

    Inventor： TAKESHITA KENJI ,  TURMEL ODETTE ,  KOZAKEVICH FELIX ,  HUDSON ERIC

    IPC: H01L21/311 ,  H01L21/768

    Abstract: A method in a plasma processing system for etching a feature through a given layer on a semiconductor substrate. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method also includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the given layer. The method additionally includes striking a plasma from the etchant source gas. Furthermore, the method includes etching the feature at least partially through the given layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 45 MHz and about 75 MHz. The bias RF signal further has a bias RF power component that is configured to cause the etch feature to be etched with an etch selectivity to a second layer of the substrate that is higher than a predefined selectivity threshold.

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