APPARATUS AND METHOD FOR INCREASING MINUTENESS UPON CONVERSION OF DIGITAL DATA INTO FULL-BRIDGE OUTPUT STAGE DRIVING PWM SIGNAL

    公开(公告)号:JPH11103586A

    公开(公告)日:1999-04-13

    申请号:JP20384998

    申请日:1998-07-17

    Abstract: PROBLEM TO BE SOLVED: To improve current control of an actuator by utilizing an up-down signal of a counter and two least significant bits (LBS) to select one set of data to be compared from four data values, thereby improving minuteness. SOLUTION: A *VAL value of a corrected value of a VAL value is calculated from the VAL value. Two selected digital values are input to respective two N-bit registers. Numeric values increased by '1' are stored in another two N-bit registers. The two LBSs of the input values are sent to a multiplexer, which, in turn, decides three intermediate levels between the two values dynamically indicated by N bits. Two complement LSBs are sent to a least digital circuit which, in turn, judges how long a basic duty cycle is elongated or contracted. Thus, a duty cycle different according to the two LSB values of a reference signal to be converted or a counting direction is formed. As a result, high minuteness can be performed.

    MANUFACTURE OF DMOS TRANSISTOR
    242.
    发明专利

    公开(公告)号:JPH11102919A

    公开(公告)日:1999-04-13

    申请号:JP20478698

    申请日:1998-07-21

    Inventor: FRANCO GIOVANNI

    Abstract: PROBLEM TO BE SOLVED: To improve the fine control of a channel region by a method wherein aluminum is made to serve as a first dopant, a first and a second dopant are introduced, and a thermal diffusion treatment is carried out once so as to diffuse these dopants at the same time. SOLUTION: A photoresist layer is provided on a polysilicon layer 5, the layer 5 and the photoresist layer are selectively removed through a photolithography technique using a first mask not only to demarcate a gate electrode 5 but also to open a window. A P-type main body region 6 is formed through the intermediary of the window using the polysilicon layer 5 and the photoresist layer as masks. Moreover, aluminum atoms are injected. The photoresist layer is removed, another photoresist layer is deposited and then selectively removed to open a window, and an N-type source region 9 is formed through the intermediary of the window. Then, a thermal treatment is carried out once, whereby aluminum atoms and an N-type dopant are diffused below the gate electrode 5, and a channel region is completely formed below the gate electrode 5.

    MANUFACTURE OF INTEGRATED MICROSCOPIC STRUCTURE OF SINGLE-CRYSTAL SEMICONDUCTOR MATERIAL

    公开(公告)号:JPH11102893A

    公开(公告)日:1999-04-13

    申请号:JP21667698

    申请日:1998-07-31

    Abstract: PROBLEM TO BE SOLVED: To reduce the cost of manufacturing without the possibility of breaking an erected structure by a method, wherein a sacrificial region of porous material is formed in the main body of single-crystal semiconductor material, and the sacrificial region is removed through the aperture of the main body. SOLUTION: A part of a substrate 2 on the lower part of the aperture of a mask is converted into porous silicon from single-crystal silicon when anodic oxidation treatment is performed, and a porous sacrificial region is formed. subsequently, the mask is removed, and a P-type epitaxial layer 7 is formed on a wafer. The epitaxial layer 7 is plasma etched using a carbide mask 25 having the aperture which is slightly larger than the resist mask, and a groove 27 extending to the porous sacrificial region from the surface of the epitaxial layer 7 is formed. At this time, etching is on the porous sacrificial region stopped automatically. The silicon porous sacrificial region is oxidized through the groove 27, and the first oxidative sacrificial region 28 is formed. Lastly, the oxidative sacrificial region 28 is removed in hydrofluoric acid, and after the mask 25 has been removed, a erected structure 30 is obtained on a gap 31 and is separated by groove 32.

    METHOD FOR CONTROLLING VOLTAGE OF HVLDMOS CIRCUIT BOARD

    公开(公告)号:JPH1168530A

    公开(公告)日:1999-03-09

    申请号:JP17706298

    申请日:1998-06-24

    Abstract: PROBLEM TO BE SOLVED: To provide a circuit, capable of more efficiently charging a capacitance without increasing the power consumption for a parasitic transistor. SOLUTION: A circuit that charges a capacitance C with an LDMOS-LD integrated transistor is provided with a switching means SWb controlled by a logical signal UVLO. Hereby, the switching means SWb is made into active state, in order to charge a board node with the current whose maximum value is restricted to the pre-established value during a phase, in which a supply voltage Vs of an integrated circuit is lower than the minimum switch-on voltage of the same integrated circuit.

    MANUFACTURE OF SEMICONDUCTOR CIRCUIT

    公开(公告)号:JPH10335478A

    公开(公告)日:1998-12-18

    申请号:JP13185698

    申请日:1998-05-14

    Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing an integrated circuit without making a manufacturing process complex and without increasing the number of generated defects. SOLUTION: An insulation layer for constituting a polycrystal Si part that prescribes an opening for forming the gate electrode and the resistor of a MOSTr, a P ion injection 27 with a low amount of concentration for forming a pair of n-type conductive parts 19 and 20 at both sides of a gate thin line part (electrode) 14, and the injection mask of polycrystalline Si including an n-type conductive resistance part 21 due to an opening are formed. Then, a resist insulation layer is formed on an entire structure, an insulation layer is subjected to anisotropic etching so that the region of a substrate without Si mask can be exposed, and the residue of an insulation material remains along the edge part of the gate electrode. For compensating for the elimination of a surface layer from a resistance part due to etching, a dosage amount where the resistance part 21 becomes a scheduled resistance value are subjected to second ion implantation by energy without any substrate mask and without changing resistance values in source and drain of MOSTr.

    OUTPUT CONTROL OF DC-DC CONVERTER CORRESPONDING TO FLUCTUATION IN SWITCHING FREQUENCY

    公开(公告)号:JPH10304659A

    公开(公告)日:1998-11-13

    申请号:JP9705098

    申请日:1998-04-09

    Abstract: PROBLEM TO BE SOLVED: To make the output of a DC/DC converter constant by clamping an error amplifier output signal of a control circuit to a voltage proportional to the amplitude of DC signals inversely proportional to the frequency or by giving an offset equal to a voltage difference between a constant voltage and DC signal to a signal occurred in a current sensing resistor. SOLUTION: A sawtooth wave signal generated by an oscillator is detected by a capacitor Cosc of an RC group. A process of generating a DC signal having an amplitude inversely proportional to that frequency, a process of clamping an error amplifier E/A output voltage to a voltage having an amplitude proportional to the amplitude of the DC signal, or a process of off-setting a signal in a current sensing resistor by a voltage, corresponding to the difference between the constant voltage and DC signal is carried out. By doing this, it becomes possible to obtain a method and a compensating circuit which can be easily realized independently of the characteristics of synchronous signal controlling the switching frequency, and can make the output power of a converter constant against the changes in switching frequency.

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