21.
    发明专利
    未知

    公开(公告)号:DE102004059599B3

    公开(公告)日:2006-08-17

    申请号:DE102004059599

    申请日:2004-12-09

    Abstract: The invention relates to a method for applying an adhesive layer to ground-thin or thinned semiconductor chips of a semiconductor wafer. In this case, the adhesive layer, with the aid of an adhesive film which is entirely composed of precurable adhesive, is introduced relatively early into a method for the thinning by grinding, separation and singulation of a semiconductor wafer to form thinned semiconductor chips, and is finally used further in the semiconductor device into which the thinned semiconductor chip is to be incorporated.

    22.
    发明专利
    未知

    公开(公告)号:DE10329143B4

    公开(公告)日:2005-09-01

    申请号:DE10329143

    申请日:2003-06-27

    Abstract: Electronic module (25) has a number of components (1-6) mounted on a wiring block (9). The wiring block has a number of outer sides (11-14) and contains internal connection leads (15) that connect external contact surfaces (10) on the outer sides of the block with each other. The contact surfaces connect to the contacts (7) of the components mounted on the block, : Independent claims are also included for the following:- (a) a device for manufacturing an electronic module and; (b) a method for manufacturing an electronic module in which a wiring block is produced by plastic injection molding and then contancts and components added to the raw plastic block.

    24.
    发明专利
    未知

    公开(公告)号:DE10209922A1

    公开(公告)日:2003-10-02

    申请号:DE10209922

    申请日:2002-03-07

    Abstract: The invention relates to an electronic module having electronic components, which are arranged in vertically staggered component layers, which are electrically conductively connected to one another via regions, which are uncovered within the respective component layers, of contact bumps or of bonding connections and via interconnects, which are arranged between the component layers and are connected to the uncovered regions. Moreover, the invention relates to a process for producing the electronic module, either in a panel or as individual components.

    27.
    发明专利
    未知

    公开(公告)号:DE502004008355D1

    公开(公告)日:2008-12-11

    申请号:DE502004008355

    申请日:2004-06-28

    Abstract: A smart card for contact data transmission includes a card body and a smart card module which is fitted in the card body. The smart card module includes a semiconductor chip with an active upper surface, a plastic housing compound that surrounds the semiconductor chip and includes at least one surface that is coplanar with the active upper surface of the semiconductor chip, a first dielectric layer that is arranged on the plastic housing compound surface and on the active upper surface of the semiconductor chip, one or more interposer metallization levels, which are isolated via further dielectric layers and are connected to the active upper surface of the semiconductor chip, and external contact surfaces. The external contact surfaces are formed on the outermost interposer level and facilitate contact data transmission. The smart card module uses no bonding wires and has a very small physical volume.

    28.
    发明专利
    未知

    公开(公告)号:DE10334575B4

    公开(公告)日:2007-10-04

    申请号:DE10334575

    申请日:2003-07-28

    Abstract: One embodiment of the invention relates to an electronic component having stacked semiconductor chips, and to a panel for production of the component. In one case, the stack has a flat conductor structure with a chip island on which a stacked semiconductor chip is arranged, while a first semiconductor chip is located underneath it. The chip island is surrounded by flat conductors which have contact pillars. These contact pillars have pillar contact pads which, together with the active upper face of the first semiconductor chip and the upper face areas of a plastic encapsulation compound form a coplanar overall upper face.

    29.
    发明专利
    未知

    公开(公告)号:DE102005050127B3

    公开(公告)日:2007-05-16

    申请号:DE102005050127

    申请日:2005-10-18

    Abstract: A structure of joining material is applied to the back surfaces of semiconductor chips in manufacturing semiconductor devices. The joining material is applied, in finely metered and structured form via a joining material jet appliance, to the back surfaces of the semiconductor chips of a divided semiconductor wafer.

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