公开(公告)号：KR1020100117539A

公开(公告)日：2010-11-03

申请号：KR1020100038143

申请日：2010-04-23

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  김영국 ,  박진주 ,  이영석 ,  윤기찬 ,  이선화

IPC: H01L31/075 ,  H01L31/04

CPC classification number: Y02E10/50 ,  H01L31/075 ,  H01L31/04

Abstract: PURPOSE: A thin film type solar battery and a manufacturing method thereof are provided to improve the efficiency of a thin film type solar battery by applying a material with a high band gap to a p-type semiconductor layer. CONSTITUTION: A front side anti-reflective layer(20) is formed on a glass substrate(10). A p-type semiconductor layer(30) is formed on the front side anti-reflective layer. An i-type semiconductor layer(40) is formed on the p-type semiconductor layer. An n-type semiconductor layer(50) is formed on the i-type semiconductor layer. A backside reflection layer(60) is formed on the n-type semiconductor layer.

Abstract translation: 目的：提供一种薄膜型太阳能电池及其制造方法，以通过向p型半导体层施加具有高带隙的材料来提高薄膜型太阳能电池的效率。 构成：在玻璃基板（10）上形成有前侧防反射层（20）。 在前侧防反射层上形成p型半导体层（30）。 在p型半导体层上形成i型半导体层（40）。 在i型半导体层上形成n型半导体层（50）。 在n型半导体层上形成有背面反射层（60）。

公开(公告)号：KR1020100069270A

公开(公告)日：2010-06-24

申请号：KR1020080127918

申请日：2008-12-16

Applicant: 성균관대학교산학협력단

Inventor： 최병덕 ,  이준신 ,  정성욱 ,  장경수 ,  조재현

IPC: G02F1/136 ,  H01L29/786

CPC classification number: H01L29/78606 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78618

Abstract: PURPOSE: A thin film transistor, a method for forming the same, and a flat panel display device with the same are provided to prevent loss of a drain area, thereby improving lifetime and performance. CONSTITUTION: A buffer layer(13), a preliminary channel area, an insulating layer, and a gate electrode layer are successively formed on a substrate(11). The gate electrode layer and the insulating layer are patterned successively so that a gate pattern(22) is formed. Impurity is doped in the exposed preliminary channel area to define a channel area(15). A protection layer(27) is formed on the front side of the substrate with source and drain areas. The first contact hole(29) and the second contact hole(31) exposing the buffer layer are formed.

Abstract translation: 目的：提供一种薄膜晶体管，其形成方法和具有该薄膜晶体管的平板显示装置，以防止漏区的损失，从而提高寿命和性能。 构成：在衬底（11）上依次形成缓冲层（13），初步沟道区，绝缘层和栅极电极层。 栅极电极层和绝缘层依次图案化，形成栅极图案（22）。 掺杂在暴露的初步通道区域中以限定通道区域（15）。 在源极和漏极区域的衬底的正面上形成保护层（27）。 形成露出缓冲层的第一接触孔（29）和第二接触孔（31）。

公开(公告)号：KR1020060121324A

公开(公告)日：2006-11-29

申请号：KR1020050043406

申请日：2005-05-24

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  김경해 ,  정성욱

IPC: H01L21/3065 ,  H01L21/8247 ,  B82Y10/00

Abstract: A method for forming a nano-pyramid type structure on a wafer using a silicon dry etching process and a gate memory using the structure are provided to increase data storage capacity of a flash memory by increasing a contact area with quantum dots of a floating gate memory. A silicon wafer(11) is transferred to an internal electrode(19) of an RF plasma reaction chamber of a vacuum state. SF6 gas and O2 gas are implanted into the inside of the RF plasma reaction chamber. RF power is applied to the RF plasma reaction chamber to generate plasma. The silicon wafer is dry-etched in a nano-pyramid type structure by controlling a flow rate of SF6 to O2 corresponding to partial gas pressure of 20~25 sccm to 10~15 sccm and controlling the RF power of 90 to 110 W.

Abstract translation: 提供了使用硅干蚀刻工艺在晶片上形成纳米金字塔型结构的方法和使用该结构的栅极存储器，以通过增加与浮动栅极存储器的量子点的接触面积来增加闪速存储器的数据存储容量 。 将硅晶片（11）转移到真空状态的RF等离子体反应室的内部电极（19）。 SF6气体和O 2气体注入到RF等离子体反应室的内部。 RF功率被施加到RF等离子体反应室以产生等离子体。 通过将对应于20〜25sccm〜10〜15sccm的局部气体压力的SF6〜O2的流量控制在90〜110W的RF功率，将硅晶片以纳米金字塔型结构进行干法蚀刻。

公开(公告)号：KR102027138B1

公开(公告)日：2019-10-01

申请号：KR1020130076812

申请日：2013-07-02

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  박형식 ,  안시현 ,  김선보 ,  신종훈 ,  정준희

IPC: H01L31/0236

公开(公告)号：KR1020130113002A

公开(公告)日：2013-10-15

申请号：KR1020120035204

申请日：2012-04-05

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  박철민 ,  송규완 ,  김봉기 ,  유경열 ,  최재우

IPC: H01L31/042 ,  H01L31/18

CPC classification number: Y02E10/50 ,  Y02P70/521 ,  H01L31/042 ,  H01L31/18

Abstract: PURPOSE: A method for forming a selective emitter layer using an etchant protecting layer is provided to prevent the selective emitter layer from being damaged by performing a wet-etching process. CONSTITUTION: A first conductive substrate is prepared (S10). A second conductive emitter layer is formed on the upper surface of the first conductive substrate (S20). An etchant protecting layer is patterned and deposited on the second conductive emitter layer (S30). The second conductive emitter layer is selectively wet-etched (S40). The etchant protecting layer is removed from the surface of the first conductive substrate (S50). [Reference numerals] (S10) Step where a first conductive substrate is prepared; (S20) Step where a second conductive emitter layer is formed on the upper surface of the first conductive substrate using an impurity with an opposite type of the first conductive substrate through an ion injection & diffusion process; (S30) Step where an etchant protecting layer is patterned and deposited on the second conductive emitter layer; (S40) Step where the second conductive emitter layer is selectively wet-etched with a wet etchant; (S50) Step where the etchant protecting layer is removed; (S60) Step where an anti-reflection layer is formed on the surface of the substrate; (S70) Step where electrodes are formed on the highly-doped emitter layer and the back of the substrate

Abstract translation: 目的：提供一种使用蚀刻剂保护层形成选择性发射极层的方法，以防止通过执行湿蚀刻工艺来损害选择性发射极层。 构成：准备第一导电性基板（S10）。 在第一导电基板的上表面上形成第二导电发射极层（S20）。 蚀刻剂保护层被图案化并沉积在第二导电发射极层上（S30）。 第二导电发射极层被选择性地湿式蚀刻（S40）。 蚀刻剂保护层从第一导电基板的表面去除（S50）。 （附图标记）（S10）准备第一导电性基板的工序; （S20）通过离子注入和扩散处理使用具有相反类型的第一导电衬底的杂质在第一导电衬底的上表面上形成第二导电发射极层的步骤; （S30）将蚀刻剂保护层图案化并沉积在第二导电发射极层上的步骤; （S40）第二导电发射极层用湿蚀刻剂选择性湿蚀刻的步骤; （S50）去除蚀刻剂保护层的步骤; （S60）在基板的表面上形成防反射层的步骤; （S70）在高掺杂发射极层和衬底的背面上形成电极的步骤

公开(公告)号：KR1020120059371A

公开(公告)日：2012-06-08

申请号：KR1020110121890

申请日：2011-11-21

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  장주연 ,  신종훈 ,  안시현 ,  박형식 ,  박진주 ,  조재현 ,  김영국 ,  장경수

IPC: H01L31/0445 ,  H01L31/075 ,  H01L31/0236 ,  H01L31/18

CPC classification number: Y02E10/50 ,  Y02P70/521 ,  H01L31/0445 ,  H01L31/0236 ,  H01L31/075 ,  H01L31/18

Abstract: PURPOSE: A thin film type solar battery and a manufacturing method thereof are provided to improve short-circuit current density by including a rear side transparent conductivity oxide layer and a rear side electrode having different reflective index. CONSTITUTION: Texture is formed on the surface of a glass substrate. A front side transparent conductivity oxide layer(110) is formed at the upper side of the glass substrate. A thin film laminated body of a p-i-n structure is formed at one side of the front side transparent conductivity oxide layer. A rear side transparent conductivity oxide layer(160) is formed at the upper side of the thin film laminated body of the p-i-n structure. A rear side electrode layer(170) is formed at the upper side of the rear side transparent conductivity oxide layer and the upper side of the front side transparent conductivity oxide layer.

Abstract translation: 目的：提供一种薄膜型太阳能电池及其制造方法，其通过包括背面透明导电氧化物层和具有不同反射率的后侧电极来提高短路电流密度。 构成：在玻璃基板的表面上形成纹理。 在玻璃基板的上侧形成有正面透明导电性氧化物层（110）。 在正面透明导电氧化物层的一侧形成p-i-n结构的薄膜层叠体。 在p-i-n结构的薄膜层叠体的上侧形成有背面透明导电氧化物层（160）。 在后侧透明导电氧化物层的上侧和前侧透明导电氧化物层的上侧形成有背面电极层（170）。

公开(公告)号：KR101081479B1

公开(公告)日：2011-11-08

申请号：KR1020100091776

申请日：2010-09-17

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  정호균 ,  정성욱 ,  장경수 ,  이원백 ,  백일호

IPC: H01L29/786 ,  G02F1/136

CPC classification number: H01L29/66757 ,  H01L21/28556 ,  H01L29/458

Abstract: PURPOSE: A method for manufacturing a silicon thin film transistor using a low temperature process is provided to reduce manufacturing costs by simplifying a crystallization process using a laser and a doping process. CONSTITUTION: A buffer layer(110) is formed on a substrate. An n type or p type micro crystal silicon thin film is deposited on the buffer layer. A source electrode or drain electrode is formed by patterning the n type or p type micro crystal silicon thin film. An active layer is formed on the source electrode or drain electrode. An insulation layer and a metal electrode(150) are formed on the active layer. A gate electrode(160) is formed by patterning the active layer, the insulation layer, and the metal electrode on the substrate. The n type or p type micro crystal silicon thin film is formed by a low temperature chemical vapor deposition process.

Abstract translation: 目的：提供使用低温工艺制造硅薄膜晶体管的方法，通过简化使用激光和掺杂工艺的结晶过程来降低制造成本。 构成：在衬底上形成缓冲层（110）。 n型或p型微晶硅薄膜沉积在缓冲层上。 通过图案化n型或p型微晶硅薄膜形成源电极或漏电极。 在源电极或漏电极上形成有源层。 绝缘层和金属电极（150）形成在有源层上。 栅极电极（160）通过在基板上构图有源层，绝缘层和金属电极而形成。 n型或p型微晶硅薄膜是通过低温化学气相沉积工艺形成的。

公开(公告)号：KR101080344B1

公开(公告)日：2011-11-04

申请号：KR1020090082943

申请日：2009-09-03

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  정우원 ,  양두환 ,  경도현 ,  권태영 ,  김선용 ,  이용우

IPC: H01L31/04

CPC classification number: Y02E10/50

Abstract: 본발명에따르면, 건식식각방법으로쉽게선택적에미터를형성할수 있으면서건식시각에의한표면데미지를제거함으로써효율이향상된태양전지의선택적에미터구조를쉽게형성할수 있는효과가있다.

公开(公告)号：KR101030447B1

公开(公告)日：2011-04-25

申请号：KR1020090017159

申请日：2009-02-27

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  김영국 ,  허종규 ,  최형욱 ,  장경수

IPC: H01L31/072 ,  H01L31/04

CPC classification number: Y02E10/50

Abstract: 본 발명은 비정질/결정질 실리콘 이종접합 태양전지와 그 제조방법에 관한 것이다.
본 발명에 의한 이종접합 태양전지는, 결정질 실리콘 웨이퍼의 전면에 비정질 실리콘을 형성하는 이종접합 실리콘 태양전지에 있어서, 상기 결정질 실리콘 웨이퍼의 전, 후면에 증착된 SiO
x 막; 및 전면에 증착된 SiO
x 막 위에 증착된 비정질 실리콘층을 포함하는 것을 특징으로 한다.
본 발명에 따르면, SiO
x 막 또는 SiO
x N
y 막을 패시베이션막으로 사용함으로써, 이종접합태양전지의 효율을 크게 향상시키는 효과가 있다. 또한, 패시베이션막을 열처리 또는 화학적 기상 증착법을 이용한 간단한 증착방법을 이용함으로써, 대량 생산에 적합한 제조방법을 제공하는 효과가 있다.
이종접합 태양전지, 비정질/결정질 이종접합 태양전지, 패시베이션층, 비정질/결정질 태양전지

公开(公告)号：KR1020110032092A

公开(公告)日：2011-03-30

申请号：KR1020090089413

申请日：2009-09-22

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  김성철 ,  양두환

IPC: H01L31/04

CPC classification number: Y02E10/50 ,  H01L31/04

Abstract: PURPOSE: A silicon substrate containing a nano-porous structure for a solar cell and a method for manufacturing the same are provided to form the nano-porous structure on the surface of the silicon substrate without the shape transformation of the silicon substrate by immersing the silicon substrate into a diluted acidic mixture solution. CONSTITUTION: An acidic mixture solution is prepared by mixing nitric acid and hydrofluoric acid. A diluted acidic mixture solution is prepared by mixing the acidic mixture solution and water. A silicon substrate is immersed into the diluted acidic mixture solution to form a nano-porous structure on the surface of the silicon substrate. The silicon substrate is mono-crystalline silicon substrate, polycrystalline silicon substrate, or non-processed crystalline silicon substrate.

Abstract translation: 目的：提供一种含有用于太阳能电池的纳米多孔结构的硅基板及其制造方法，以在硅基板的表面上形成纳米多孔结构体，而不会通过将硅基板浸入硅基板而进行形状变换 将底物倒入稀酸性混合溶液中。 构成：通过混合硝酸和氢氟酸来制备酸性混合溶液。 通过混合酸性混合物溶液和水来制备稀释的酸性混合物溶液。 将硅衬底浸入稀酸性混合溶液中以在硅衬底的表面上形成纳米多孔结构。 硅衬底是单晶硅衬底，多晶硅衬底或非加工晶体硅衬底。