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公开(公告)号：US09905438B2
公开(公告)日：2018-02-27
申请号：US15466063
申请日：2017-03-22
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor： Ming-Chen Sun , Chun-Hsien Lin , Tzu-Chieh Shen , Shih-Chao Chiu , Yu-Cheng Pai
IPC: H01L21/48 , H01L23/00 , H01L23/498
CPC classification number: H01L21/4853 , H01L21/486 , H01L21/563 , H01L23/3114 , H01L23/3121 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/13082 , H01L2224/131 , H01L2224/16238 , H01L2224/81191 , H01L2224/81815 , H01L2224/8182 , H01L2924/15313 , H05K1/111 , H05K3/20 , H05K3/205 , H05K3/428 , H05K2201/0376 , H05K2201/09481 , H05K2201/09563 , H05K2201/10674 , H01L2924/00014 , H01L2924/014
Abstract: A package substrate and a semiconductor package are provided. The package substrate includes an insulating layer having opposing first and second surfaces; a first wiring layer formed in the insulating layer, exposed from the first surface of the insulating layer, and having a plurality of first conductive pads; a second wiring layer formed in the insulating layer, exposed from the second surface, and having a plurality of second conductive pads; a third wiring layer formed on the first surface and electrically connected with the first wiring layer; a plurality of first metal bumps formed on the first conductive pads corresponding; and at least one conductive via vertically embedded in the insulating layer and electrically connected to the second and third wiring layers. Therefore, the surfaces of first conductive pads are reduced, and the non-wetting between the first conductive pads and the solder materials formed on conductive bumps is avoided.
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公开(公告)号：US20180042102A1
公开(公告)日：2018-02-08
申请号：US15461618
申请日：2017-03-17
Applicant: JAHWA electronics Co., Ltd.
Inventor： Chun CHOI , Soon Koo SHIM , Young Bin CHONG , Nam Jin CHOI , Won Gook LEE , Min Goo LEE , Kyung Hoon JO
CPC classification number: H05K1/0216 , B06B1/0207 , B06B1/045 , H02K11/02 , H02K33/16 , H02K2211/03 , H05K1/09 , H05K1/112 , H05K1/165 , H05K2201/09263 , H05K2201/09481 , H05K2201/09672
Abstract: A printed circuit board includes a pad to receive an electric signal from a controller, a plurality of signal lines connected to the pad to transmit the electric signal received at the pad, and a signal transmission unit connected to the signal lines to transmit the electric signal to a coil. The plurality of signal lines are configured to face each other in at least a partial region and/or disposed in a zigzag form in at least a partial region. If the printed circuit board and a vibration actuator including the printed circuit board are used, it is possible to change a high frequency interference region according to a pattern by changing a pattern of the printed circuit board, and to improve receiving efficiency of an antenna by reducing high frequency noise.
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公开(公告)号：US09787022B2
公开(公告)日：2017-10-10
申请号：US15146652
申请日：2016-05-04
Applicant: JoyLabz LLC
Inventor： Bryan Randall Wilcox , Todd Eddie , Jay Saul Silver
CPC classification number: H01R13/6205 , G06F1/16 , H01R11/24 , H01R13/6658 , H01R2201/06 , H05K1/11 , H05K1/111 , H05K1/113 , H05K1/117 , H05K5/0278 , H05K2201/083 , H05K2201/09381 , H05K2201/0939 , H05K2201/094 , H05K2201/09427 , H05K2201/09481 , H05K2201/10386
Abstract: Systems and methods for magnetic coupling. One system includes an external computing device and a connector having a conductive end. The system also includes a printed circuit board. The printed circuit board includes a connector side opposite a back side. The connector side has a contact pad with an aperture. The printed circuit board also includes a magnet positioned on the back side of the printed circuit board. The magnet provides a magnetic field configured to provide magnetic attraction forces to a connector contacting the contact pad. The printed circuit board also includes a communication terminal. The system also includes a circuit in communication with the printed circuit board through the connector and contact pad.
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公开(公告)号：US09773725B2
公开(公告)日：2017-09-26
申请号：US14613893
申请日：2015-02-04
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Kevin Bills , Mahesh Bohra , Jinwoo Choi , Tae Hong Kim , Rohan Mandrekar
CPC classification number: H01L23/49822 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L24/16 , H01L2224/16 , H01L2224/16235 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/3011 , H05K1/0231 , H05K1/024 , H05K1/0251 , H05K1/113 , H05K1/144 , H05K2201/0187 , H05K2201/041 , H05K2201/09481 , H05K2201/09718 , H05K2201/10734 , Y10T29/49124 , Y10T29/49151 , H01L2924/00
Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.
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公开(公告)号：US09728912B2
公开(公告)日：2017-08-08
申请号：US14962131
申请日：2015-12-08
Applicant: INTEL CORPORATION
Inventor： Vijay Kasturi
CPC classification number: H01R24/50 , H01R12/526 , H01R12/53 , H05K1/0219 , H05K1/0298 , H05K1/117 , H05K1/14 , H05K3/32 , H05K2201/09236 , H05K2201/09481 , H05K2201/10189 , H05K2201/10356
Abstract: An adaptor board may include a multi-layer circuit board having at least three layers, namely a first board layer, a second board layer, and a third board layer. A first plurality of cable contacts may be provided at the first board layer, and a second plurality of cable contacts may be provided at the third board layer.
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Patent Agency Ranking
公开(公告)号：US09668346B2
公开(公告)日：2017-05-30
申请号：US14037645
申请日：2013-09-26
Applicant: Mitsubishi Electric Corporation
Inventor： Mizuki Shirao , Nobuo Ohata , Nobuyuki Yasui , Hiroshi Aruga
CPC classification number: H05K1/118 , H01P3/003 , H01P3/081 , H01P5/028 , H05K1/0245 , H05K1/0251 , H05K1/0253 , H05K3/363 , H05K2201/09181 , H05K2201/09481 , H05K2201/09609 , H05K2201/09618 , H05K2201/0969 , H05K2201/09727
Abstract: A terminal portion configured to obtain electrical connection with a printed circuit board includes a first signal pad that is formed in a first conductor layer and is electrically separated from a ground layer, a pair of first ground pads that is formed in the first conductor layer to sandwich the first signal pad and is connected to the ground layer, a second signal pad that is formed in a second conductor layer and is connected to a signal line, a pair of second ground pads that is formed in the second conductor layer to sandwich the second signal pad and is electrically separated from the signal line, a third signal pad formed in a third conductor layer, and a pair of third ground pads formed in the third conductor layer to sandwich the third signal pad. The second signal pad is wider than the third signal pad.
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公开(公告)号：US20160225705A1
公开(公告)日：2016-08-04
申请号：US14613893
申请日：2015-02-04
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Kevin Bills , Mahesh Bohra , Jinwoo Choi , Tae Hong Kim , Rohan Mandrekar
IPC: H01L23/498 , H05K1/14
CPC classification number: H01L23/49822 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L24/16 , H01L2224/16 , H01L2224/16235 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/3011 , H05K1/0231 , H05K1/024 , H05K1/0251 , H05K1/113 , H05K1/144 , H05K2201/0187 , H05K2201/041 , H05K2201/09481 , H05K2201/09718 , H05K2201/10734 , Y10T29/49124 , Y10T29/49151 , H01L2924/00
Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.
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公开(公告)号：US20160183366A1
公开(公告)日：2016-06-23
申请号：US14907613
申请日：2014-07-25
Applicant: FUJIKURA LTD.
Inventor： Yuki Ishida , Yusuke Nakatani
IPC: H05K1/02
CPC classification number: H05K1/0296 , H05K1/028 , H05K1/113 , H05K1/118 , H05K1/147 , H05K3/361 , H05K2201/09063 , H05K2201/09481 , H05K2201/09563 , H05K2201/09781 , H05K2201/10128 , H05K2203/0278
Abstract: A flexible printed board electrically connected to an electronic component (for example, a liquid crystal panel) by thermal compression bonding, including a flexible substrate, a terminal portion formed on one surface of the flexible substrate and having a plurality of connection terminals to be connected to the electronic component, a wire portion having a plurality of wires formed on the other surface of the flexible substrate, and a plurality of through wires formed inside through holes penetrating the flexible substrate in a compression bonding connection area to the electronic component of the terminal portion to connect the connection terminals of the terminal portion and the respective wires of the wire portion.
Abstract translation: 一种柔性印刷电路板，其通过热压接而电连接到电子部件（例如液晶面板），包括柔性基板，形成在柔性基板的一个表面上的端子部分，并具有要连接的多个连接端子 电子部件具有形成在柔性基板的另一面上的多根线的线部分，以及在与端子的电子部件的压接连接区域中穿透柔性基板的贯通孔内的多根贯通线 连接端子部分的连接端子和导线部分的各个导线的部分。
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19.发明申请公开(公告)号：US20160007446A1
公开(公告)日：2016-01-07
申请号：US14768424
申请日：2014-02-12
Applicant: TAIYO YUDEN CO., LTD.
Inventor： Kazuya ISHIKAWA , Nobuhiro SASAKI , Hideo ISHIHARA , Katsunosuke HAGA
CPC classification number: H05K1/0216 , H01G4/12 , H01G4/232 , H01G4/30 , H05K1/113 , H05K1/181 , H05K2201/09481 , H05K2201/10015 , H05K2201/10378 , H05K2201/10636 , Y02P70/611
Abstract: An embodiment of an multilayer ceramic capacitor with interposer includes: an interposer 20 having an insulated substrate 21, two first conductor pads 22, two second conductor pads 23 and two conductor vias 24 connecting the first conductor pads 22 and second conductor pads 23; and a multilayer ceramic capacitor 10 having external electrodes 12 that are each connected to each first conductor pad 22 of the interposer 20 via solder SOL. Each conductor via 24 of the interposer 20 has a through hole 24a inside, and a void GA not filled with the solder SOL is present in each through hole 24a on the second conductor pad 23 side. The multilayer ceramic capacitor with interposer is capable of suppressing noise due to electrostriction.
Abstract translation: 具有插入器的多层陶瓷电容器的实施例包括：具有绝缘基板21，两个第一导体焊盘22，两个第二导体焊盘23和连接第一导体焊盘22和第二导体焊盘23的两个导体通孔24的插入件20; 以及具有外部电极12的多层陶瓷电容器10，每个外部电极12经由焊料SOL连接到插入件20的每个第一导体焊盘22。 插入器20的每个导体通孔24在其内部具有通孔24a，并且在第二导体焊盘23侧的每个通孔24a中都存在未填充有焊料SOL的空隙GA。 具有中介层的多层陶瓷电容器能够抑制由于电致伸缩引起的噪声。
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公开(公告)号：US20150177779A1
公开(公告)日：2015-06-25
申请号：US14544875
申请日：2015-02-27
Applicant: James E. Clayton , Zakaryae Fathi
Inventor： James E. Clayton , Zakaryae Fathi
CPC classification number: G06F1/16 , G06F1/184 , G06F1/185 , H01R12/62 , H05K1/028 , H05K1/118 , H05K1/147 , H05K1/181 , H05K3/366 , H05K2201/046 , H05K2201/09481 , H05K2201/10159 , H05K2201/10189 , H05K2201/10409 , H05K2201/10545
Abstract: An electrical interconnection system comprises a bifurcated, multilayer flex circuit having electrode pads on the inner surfaces of the bifurcation. Electronic components are mounted on one or both sides of the flex circuit by conventional means. When the bifurcation is spread apart, the electrode pads are alignable with respective contacts on a printed circuit board. After bonding the pads to the contacts by soldering, conductive adhesive, or other means, a secure electrical connection is maintained while still allowing the flex circuit to bend somewhat from side to side, creating additional design options not available with rigidly mounted components and modules.
Abstract translation: 电互连系统包括在分叉的内表面上具有电极焊盘的分叉的多层柔性电路。 电子部件通过常规方式安装在柔性电路的一侧或两侧。 当分叉分开时，电极焊盘可与印刷电路板上的各个触点对准。 在通过焊接，导电粘合剂或其他方式将焊盘接合到触点之后，保持牢固的电连接，同时仍然允许柔性电路从一侧到另一侧弯曲一些，从而产生不具有刚性安装的部件和模块的附加设计选项。
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