公开(公告)号：DE102005034669A1

公开(公告)日：2007-02-08

申请号：DE102005034669

申请日：2005-07-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUCH LOTHAR ,  NASH EVA ,  MEYNE CHRISTIAN ,  KOESTLER WOLFRAM ,  HASMANN JENS

IPC: G03F1/00 ,  G03F1/36 ,  G03F7/00

Abstract: The mask has a pattern having two line-shaped structural components (10, 12) that are formed on the mask parallel to each other and form a gap (20). An arrangement of auxiliary structures has two auxiliary structures (14, 15) that are arranged in the gap parallel to the structural components. The arrangement of the auxiliary structures has space for the components, where the space is larger than another space having adjacent auxiliary structures. An independent claim is also included for a method of forming a pattern on mask for lithographic projection on a substrate.

公开(公告)号：DE10126130A1

公开(公告)日：2002-12-12

申请号：DE10126130

申请日：2001-05-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUCH LOTHAR ,  GRUENING-VON SCHWERIN ULRICKE ,  HAFFNER HENNING ,  KOWALEWSKI JOHANNES ,  SAVIGNAC DOMINIQUE ,  MORHARD KLAUS-DIETER ,  THIELSCHER GUIDO ,  TRINOWITZ REINER

IPC: G03F1/00 ,  H01L21/768 ,  H01L21/28

Abstract: The method involves using a mask illuminated with short-wave light in an optical lithographic method. The mask has elongated, slit-shaped openings for producing essentially circular and/or elongated contact holes (2,6). The illumination conditions are selected so that an image reduction of at least 200 to 400 nm. occurs in the longitudinal direction of the openings.

公开(公告)号：DE10032282A1

公开(公告)日：2002-01-24

申请号：DE10032282

申请日：2000-07-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUCH LOTHAR ,  LEHR MATTHIAS ,  LEIBERG WOLFGANG ,  SPINLER STEFAN

IPC: G03F7/09 ,  H01L21/311 ,  H01L21/768 ,  G03F7/20

Abstract: Lithographic exposure and structuring comprises preparing a substrate (1); applying an anti-refection layer (4) made up of several layers on the substrate; applying a material layer (2) to be treated on the anti-reflection layer; applying a photoresist layer (3) directly to the material layer; and exposing and structuring the photoresist layer so that the material layer is exposed in pre-determined sections for local selective treatment. An Independent claim is also included for the production of a metallic conducting pathway comprising forming a structured photoresist layer as above; removing the material layer in the exposed sections; optionally carrying out the previous two steps; depositing metallic conducting pathway material in the etched recess; and optionally back-polishing the metallic material. Preferred Features: The anti-refection layer is a SiON layer and the material layer is a SiO2 or nitride layer.

公开(公告)号：DE10356699A1

公开(公告)日：2005-09-08

申请号：DE10356699

申请日：2003-11-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： CRELL CHRISTIAN ,  BAUCH LOTHAR ,  MOELLER HOLGER ,  ZIEBOLD RALF

IPC: G03B27/42 ,  G03F1/00 ,  G03F7/20 ,  G03F9/00

Abstract: Lithography mask having a structure for the fabrication of semiconductor components, in particular memory components, for a direction-dependent exposure device, featuring at least one auxiliary structure ( 1 ) for minimizing scattered light, the auxiliary structure ( 1 ) essentially being arranged in a low-resolution exposure direction of the direction-dependent exposure device ( 11, 11 a, 11 b) for the mask ( 10, 10 a , 10 b). A means for reducing scattered light is thus created by the auxiliary structure in a simple manner.

公开(公告)号：DE10203357A1

公开(公告)日：2003-08-14

申请号：DE10203357

申请日：2002-01-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WURZER HELMUT ,  FEURLE ROBERT ,  BAUCH LOTHAR ,  VOIGT INA

IPC: G03F1/00 ,  G03F1/36 ,  G03F1/14

Abstract: A photolithographic mask has the advantage that a combination of dummy structures, whose pattern is imaged into the resist layer, and auxiliary structures, whose pattern is not imaged into the resist layer, makes it possible to achieve a significant improvement in the imaging properties of the main structures which are disposed at an edge of a region containing a multiplicity of main structures. In particular, constrictions at the structures can be significantly reduced or completely avoided and/or a so-called "tilting" of the structures under non-optimum focus conditions is significantly reduced or completely avoided.

公开(公告)号：DE19939852A1

公开(公告)日：2001-03-15

申请号：DE19939852

申请日：1999-08-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUCH LOTHAR ,  ZELL THOMAS ,  LEHR MATTHIAS UWE ,  KIESLICH ALBRECHT

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/28

Abstract: Stacked vias are produced by introducing metal islands that are referred to as landing pads in order to establish a contact between superimposed stacks. Due to the line shortening effect, said landing pads substantially project laterally over the vias. According to the invention, vias that are located in superimposed layers are off-set laterally. The inventive landing pad is substantially configured as a track that extends between the vias. The contact surfaces provided at the end of the track can be chosen smaller than the square contact surfaces of conventional metal islands since the line shortening effect is less critical for longer tracks. The inventive structures save space and can be more easily accommodated in a circuit layout to be miniaturized, thereby resulting in an increased shrink factor of the semiconductor structure.