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公开(公告)号:DE10156465C1
公开(公告)日:2003-07-10
申请号:DE10156465
申请日:2001-11-16
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RUEB MICHAEL , PAIRITSCH HERBERT
Abstract: The first and second surfaces (3, 4) of a first wafer (1) are recessed (2, 5) forming penetrations between them, over the entire first surface of the first wafer. A temperature-stable, detachable connection (21) is formed between them, with spacing layers (13-15) of dielectric, uniting the first surface of the first wafer with a first surface of the second wafer, by wafer-bonding connection. An Independent claim is included for a corresponding method of forming a detachable, highly-temperature stable bond between two wafers.
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公开(公告)号:DE10100438A1
公开(公告)日:2002-07-18
申请号:DE10100438
申请日:2001-01-08
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RUEB MICHAEL , WERNER WOLFGANG , KOLB STEFAN
Abstract: A hollow (2) is produced in a semiconductor body (1). Insulation zones (30) are produced between first (14) and second (12) electrode zones that surround the hollow space. An Independent claim is made for a sensor element comprising two electrode zones each made from a single crystal semiconductor.
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公开(公告)号:DE10066053A1
公开(公告)日:2002-06-27
申请号:DE10066053
申请日:2000-12-08
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER HANS , AHLERS DIRK , STENGL JENS-PEER , DEBOY GERALD , WILLMEROTH ARMIN , RUEB MICHAEL , CUADRON MARION MIGUEL
IPC: H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L29/739
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公开(公告)号:DE102004063991B4
公开(公告)日:2009-06-18
申请号:DE102004063991
申请日:2004-10-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HIRLER FRANZ , WAHL UWE , MEYER THORSTEN , RUEB MICHAEL , WILLMEROTH ARMIN , SCHMITT MARKUS , TOLKSDORF CAROLIN , SCHAEFFER CARSTEN
IPC: H01L21/336 , H01L29/78
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公开(公告)号:DE59913715D1
公开(公告)日:2006-09-07
申请号:DE59913715
申请日:1999-04-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DEBOY GERALD , STENGL JENS-PEER , STRACK HELMUT , WEBER HANS , GRAF HEIMO , RUEB MICHAEL , AHLERS DIRK
IPC: H01L29/78 , H01L21/336 , H01L29/06 , H01L29/417 , H01L29/423
Abstract: A semiconductor component has a semiconductor body comprising a blocking pn junction, a source zone of a first conductivity type connected to a first electrode and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type connected to a second electrode. The side of the zone of the second conductivity type facing the drain zone forms a first surface, and in the region between the first surface and a second surface located between the first surface and the drain zone, comprises areas of the first and second conductivity type nested in one another. The second surface is positioned at a distance from the drain zone such that the areas of the first and second conductivity type nested in each other do not reach the drain zone.
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公开(公告)号:DE102004052643A1
公开(公告)日:2006-05-04
申请号:DE102004052643
申请日:2004-10-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HIRLER FRANZ , WAHL UWE , MEYER THORSTEN , RUEB MICHAEL , WILLMEROTH ARMIN , SCHMITT MARKUS , TOLKSDORF CAROLIN , SCHAEFFER CARSTEN
IPC: H01L29/78 , H01L21/336
Abstract: Lateral trench transistor (200) has a body region (4) inside which a semiconductor region (10) is provided adjoining to it. The semiconductor region is electrically connected with the source contact (12) and its type of endowment corresponds to the type of endowment of body region. An independent claim is also included for a method for manufacturing of endowed semiconductor region.
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公开(公告)号:DE102004037153A1
公开(公告)日:2006-03-23
申请号:DE102004037153
申请日:2004-07-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHMIDT GERHARD , RUEB MICHAEL
IPC: H01L21/762 , H01L29/06
Abstract: Power semiconductor component (1) is formed using semiconductor material (20) with central region (20Z), edge region (20R) and surface region. In central region is formed basic semiconductor circuit (10). In edge region is formed electric terminal region (30) with trench structure (40) for semiconductor circuit.Trench structure is formed to extend from surface region of semiconductor material vertically into semiconductor material. Method requires only single photo structure using step and single mask.
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公开(公告)号:DE102004054352B3
公开(公告)日:2006-02-16
申请号:DE102004054352
申请日:2004-11-09
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RUEB MICHAEL
IPC: H01L29/06
Abstract: A capacitor structure (3) in semiconductor component (1) trough structures (2) comprises conducting islands made of metallic and/or semiconducting materials and/or metal compounds. The conducting islands are stacked on top of one another at at least two opposing locations on the trough structures. The inner walls of the trough have an insulating coating (13). The regions between the islands are filled with insulating and dielectric material (15).
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公开(公告)号:DE102004003538B3
公开(公告)日:2005-09-08
申请号:DE102004003538
申请日:2004-01-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RUEB MICHAEL , DETZEL THOMAS
IPC: H01L21/336 , H01L21/768 , H01L23/522 , H01L23/528 , H01L29/417 , H01L29/45 , H01L29/78 , H01L31/113
Abstract: An integrated semiconductor circuit having a first and a second portion of a substrate, in which a power semiconductor circuit structure and a logic circuit structure are respectively formed. The metallization having a power metal layer and an in relative terms thinner logic metal layer, the two metal layers being located directly above one another in this order, without an intermetal dielectric between them, only in the first portion above the power semiconductor circuit structure, and an uninterrupted conductive barrier layer being located at least between the power metal layer and the intermediate oxide layer and also between the power metal layer and the contact regions and electrode portions of the power semiconductor circuit structure which it contact-connects, and to a method for fabricating it.
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公开(公告)号:DE10260286A1
公开(公告)日:2004-08-19
申请号:DE10260286
申请日:2002-12-20
Applicant: INFINEON TECHNOLOGIES AG
Inventor: RUEB MICHAEL , SCHULZE HANS-JOACHIM , NIEDERNOSTHEIDE FRANZ-JOSEF
IPC: H01L21/263 , H01L21/265 , H01L21/322 , H01L21/324 , H01L29/06
Abstract: The method involves producing defects and forming defect complexes correlated with hydrogen. The method involves forming defects by ion implantation of non-doping ions, carrying out treatment with hydrogen and then annealing. The hydrogen treatment and annealing are carried out by temperature processing in a hydrogen atmosphere or by hydrogen-plasma processing.
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