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公开(公告)号：KR1020060076806A
公开(公告)日：2006-07-05
申请号：KR1020040115154
申请日：2004-12-29
Applicant: 삼성전기주식회사
IPC: H05K3/18
CPC classification number: H05K3/244 , H05K1/09 , H05K2203/0392
Abstract: 본 발명은 인쇄회로기판 및 그 제조 방법에 관한 것이다. 보다 구체적으로, 본 발명은 IC 패키지 기판으로 사용되는 인쇄회로기판 및 그 제조방법에 관한 것으로서, 인쇄회로기판의 외층에 노출된 동박에 니켈 등의 금속을 도금함으로써, 종래에 인쇄회로기판의 외부에 도포되던 솔더 레지스트를 대체함으로써 IC 패키지용 기판의 제조 비용 절감하고 솔더 레지스트 도포 시의 단점을 해소할 수 있는 인쇄회로기판 구조 및 그 제조 방법에 관한 것이다.
솔더 레지스트, 니켈 도금, 외층 회로 보호-
公开(公告)号：KR1020060025777A
公开(公告)日：2006-03-22
申请号：KR1020040074583
申请日：2004-09-17
Applicant: 삼성전기주식회사
IPC: H05K1/02
CPC classification number: B81B3/0072 , B81B7/0032
Abstract: 본 발명은 MEMS(Mircor Electro Mechanical Systems) 구조를 포함한 인쇄회로기판 및 그 제조 방법에 관한 것이다.
보다 구체적으로, 본 발명은 종래의 실리콘 기판 등에 MEMS 구조를 형성하고 이를 다시 PCB 기판 등의 베이스 기판에 다시 실장하던 방식과 달리 저렴한 인쇄회로기판에 직접 MEMS 구조를 형성함으로써 공정 및 단가를 감소시킬 수 있는 MEMS 및 그 제조 방법에 관한 것이다.
MEMS, 인쇄회로기판, 마이크로 구조, 마이크로 머시닝-
公开(公告)号：KR1020080080788A
公开(公告)日：2008-09-05
申请号：KR1020070020958
申请日：2007-03-02
Applicant: 삼성전기주식회사
CPC classification number: H05K1/162 , H05K3/205 , H05K3/4626 , H05K3/4652 , H05K3/4655 , H05K3/4688 , H05K2201/0209 , H05K2201/09672 , Y10T29/49126 , Y10T29/49128 , Y10T29/49165 , Y10T29/49169
Abstract: A PCB(Printed Circuit Board) for improving tolerance of an embedded capacitor and a manufacturing method thereof are provided to exclude a flat coating process and to improve adhesion between a substrate and the embedded capacitor by inserting a circuit layer including a lower electrode into a resin insulating layer. A manufacturing method of a PCB with an embedded capacitor includes the steps of: preparing a metal plate having a first circuit layer on one surface through an additive process, wherein the first circuit layer has a lower electrode and a circuit pattern; preparing a PCB having a resin insulating layer(202) on an inner layer(201); stacking the metal plate having the first circuit layer on the resin insulating layer of the PCB; exposing the first circuit layer and the resin insulating layer by removing the metal plate in a thickness direction; stacking a dielectric sheet, which is composed of a dielectric layer(301) having a metal layer for a second circuit layer on one surface, on the exposed first circuit layer and resin insulating layer; forming the second circuit layer including an upper electrode(303) and a circuit pattern by patterning the metal layer for the second circuit layer; forming a via to connect the circuit layers including the upper and lower electrodes electrically; and forming an outer circuit layer(308) through a build up process.
Abstract translation: 提供了用于提高嵌入式电容器的容限的PCB（印刷电路板）及其制造方法，以排除平面涂布工艺，并且通过将包括下电极的电路层插入到树脂中来改善衬底和嵌入式电容器之间的粘合性 绝缘层。 具有嵌入式电容器的PCB的制造方法包括以下步骤：通过添加工艺制备在一个表面上具有第一电路层的金属板，其中第一电路层具有下电极和电路图案; 制备在内层（201）上具有树脂绝缘层（202）的PCB; 将具有第一电路层的金属板堆叠在PCB的树脂绝缘层上; 通过在厚度方向上移除金属板来暴露第一电路层和树脂绝缘层; 在暴露的第一电路层和树脂绝缘层上堆叠由在一个表面上具有用于第二电路层的金属层的电介质层（301）构成的电介质片; 通过图案化用于第二电路层的金属层，形成包括上电极（303）和电路图案的第二电路层; 形成通孔以电连接包括上电极和下电极的电路层; 以及通过建立过程形成外部电路层（308）。
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公开(公告)号：KR100857165B1
公开(公告)日：2008-09-05
申请号：KR1020070036510
申请日：2007-04-13
Applicant: 삼성전기주식회사
IPC: H05K3/12
CPC classification number: C25D7/123 , H05K3/0038 , H05K3/108 , H05K3/205 , H05K3/421 , H05K3/423 , H05K2201/0376 , H05K2201/0394 , H05K2201/09563 , H05K2203/108
Abstract: A method for manufacturing a printed circuit board is provided to form a circuit pattern with a high density by forming an embossed carving pattern on a metal layer of a carrier and transferring the embossed carving pattern to an insulated layer. A method for manufacturing a printed circuit board includes the steps of: forming an embossed carving pattern corresponding to a circuit pattern on a metal layer of a carrier(S100); stacking and compressing the carrier on the insulated layer so that the embossed carving pattern faces toward the insulated layer(S200); removing the carrier, and transferring the metal layer and the embossed carving pattern to the insulated layer(S300); forming a via-hole on the insulated layer to which the metal layer is transferred(S400); forming a seed layer on the via-hole(S500); and filling the via-hole and forming a plating layer on the metal layer by performing an electrolytic plating for the insulated layer to which the metal layer is transferred using the metal layer and the seed layer as an electrode(S600).
Abstract translation: 提供一种制造印刷电路板的方法，通过在载体的金属层上形成压纹雕刻图案并将压纹雕刻图案转印到绝缘层上，形成具有高密度的电路图案。 制造印刷电路板的方法包括以下步骤：在载体的金属层上形成与电路图形相对应的压纹雕刻图案（S100）; 在绝缘层上堆叠和压缩载体，使得压花雕刻图案朝向绝缘层（S200）; 移除载体，并将金属层和压纹雕刻图案转印到绝缘层上（S300）; 在转移金属层的绝缘层上形成通孔（S400）; 在所述通孔上形成种子层（S500）; 并且通过使用金属层和种子层作为电极对被转印金属层的绝缘层进行电解电镀（S600），填充通孔并在金属层上形成镀层。
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公开(公告)号：KR1020080034711A
公开(公告)日：2008-04-22
申请号：KR1020060100996
申请日：2006-10-17
Applicant: 삼성전기주식회사
IPC: H05K3/12
CPC classification number: H05K3/125 , H05K3/1258 , H05K2203/013
Abstract: An apparatus and a method for manufacturing a printed circuit board are provided to remarkably lower a dielectric constant around a corresponding circuit and suppress a signal transmission delay in a high-frequency signal. An apparatus for manufacturing a printed circuit board includes a first head and a second head. The printed circuit board includes an insulation layer(50(b)) and a circuit pattern(50(a)). The first head selectively applies first ink having an insulating property to correspond to the insulation layer. The second head selectively applies second ink including a metal to correspond to the circuit pattern. The apparatus for manufacturing the printed circuit board further includes a third head. The printed circuit board includes an empty area, and the third head selectively applies third ink to correspond to the empty area. The third ink is dissolved by a predetermined solvent.
Abstract translation: 提供一种用于制造印刷电路板的装置和方法，以显着降低相应电路周围的介电常数，并抑制高频信号中的信号传输延迟。 印刷电路板的制造装置包括第一头部和第二头部。 印刷电路板包括绝缘层（50（b））和电路图案（50（a））。 第一头选择性地施加具有绝缘性能的第一油墨以对应于绝缘层。 第二头选择性地施加包括金属的第二墨水以对应于电路图案。 用于制造印刷电路板的装置还包括第三头。 印刷电路板包括空白区域，第三头部选择性地施加第三墨水以对应于空白区域。 第三油墨被预定的溶剂溶解。
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Patent Agency Ranking
公开(公告)号：KR100770168B1
公开(公告)日：2007-10-26
申请号：KR1020060091277
申请日：2006-09-20
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K3/4623 , H05K1/113
Abstract: A method for manufacturing a PCB(Printed Circuit Board) is provided to reduce a manufacturing cost of the circuit board by simplifying a manufacturing process for the PCB. A rapid prototyping system is used to form a circuit structure having a circuit pattern(13) from a conductive material. The circuit structure is inserted into a mold and an insulation material is condensed between the circuit patterns. The circuit structure is detached from the mold. A portion of the circuit pattern is exposed to form a pad. The circuit structure is a 3-dimensional structure, in which plural layers are laminated. The conductive material is metal. The circuit structure is formed using a selective laser sintering process.
Abstract translation: 提供一种制造PCB（印刷电路板）的方法，通过简化PCB的制造工艺来减少电路板的制造成本。 快速成型系统用于形成具有来自导电材料的电路图案（13）的电路结构。 将电路结构插入模具中，绝缘材料在电路图案之间凝结。 电路结构与模具分离。 电路图案的一部分被暴露以形成垫。 电路结构是层叠多层的3维结构。 导电材料是金属。 使用选择性激光烧结工艺形成电路结构。
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公开(公告)号：KR100726238B1
公开(公告)日：2007-06-08
申请号：KR1020060071693
申请日：2006-07-28
Applicant: 삼성전기주식회사
IPC: H05K3/46
Abstract: A manufacturing method of a multi-layer PCB(Printed Circuit Board) is provided to reduce a process and manufacturing cost by forming a via hole with a photoresist without a drilling process for conduction between circuit pattern layers. A manufacturing method of a multi-layer PCB includes the steps of: laminating a first photoresist on a core substrate having an inner layer circuit on a surface(100); selectively leaving the first photoresist corresponding to a position where a via is formed(120); laminating a buildup layer having an outer layer circuit on a surface, on the core substrate(140); selectively removing the buildup layer corresponding to the position where the via is formed, and forming a via hole by removing the first photoresist(160); and forming the via by electrically conducting the via hole(180).
Abstract translation: 提供了一种多层PCB（印刷电路板）的制造方法，通过在没有用于电路图案层之间的导电的钻孔工艺的情况下用光致抗蚀剂形成过孔来减少工艺和制造成本。 一种多层PCB的制造方法包括以下步骤：在表面（100）上的具有内层电路的核心基板上层压第一光致抗蚀剂; 选择性地留下对应于形成通孔的位置的第一光致抗蚀剂（120）; 在核心基板（140）上层压具有外层电路的堆积层; 选择性地去除与形成通孔的位置相对应的堆积层，并且通过去除第一光致抗蚀剂（160）来形成通孔; 以及通过导电通孔（180）形成通孔。
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公开(公告)号：KR100716826B1
公开(公告)日：2007-05-09
申请号：KR1020050038949
申请日：2005-05-10
Applicant: 삼성전기주식회사
CPC classification number: H01L24/18 , H01L24/82 , H01L2224/16225 , H01L2224/18 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01015 , H01L2924/01016 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H05K1/188 , H05K3/429 , H05K3/4602 , H05K2201/0355 , H05K2201/09536 , H05K2201/0959 , H01L2924/00 , H01L2224/0401
Abstract: 본 발명은 전자부품을 내장한 기판의 제조방법에 관한 것으로서, 특히 고밀도 집적회로 등을 내장한 부품내장기판을 적층에 의해 전자부품이 내장된 코어층을 형성한 후에 추가적인 회로층을 형성함으로써 낮은 비용 및 단순화된 공정으로 전자부품을 내장한 기판을 제조할 수 있도록 하는 전자부품이 내장된 기판의 제조방법을 제공한다.
기판, 동박, 적층재, 전자부품-
公开(公告)号：KR100632554B1
公开(公告)日：2006-10-11
申请号：KR1020040116807
申请日：2004-12-30
Applicant: 삼성전기주식회사
IPC: H05K1/16
CPC classification number: H05K1/162 , H05K3/0047 , H05K3/427 , H05K2201/0187 , H05K2201/09645 , H05K2201/09836 , H05K2201/09981 , H05K2203/1476 , Y10T29/49155 , Y10T29/49156
Abstract: 본 발명은 절연층내에 긴 길이의 내장형 커패시터를 형성함으로써, 고용량의 커패시턴스(capacitance)를 제공하고 커패시턴스의 용량 설계가 자유로운 커패시터 내장형 인쇄회로기판 및 그 제조방법에 관한 것이다.
커패시터 내장형 인쇄회로기판, 내장형 커패시터, 인쇄회로기판, PCB-
公开(公告)号：KR100455890B1
公开(公告)日：2004-11-06
申请号：KR1020020083607
申请日：2002-12-24
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K1/162 , H05K3/382 , H05K3/429 , H05K3/4652 , H05K2201/0209 , H05K2201/0355 , H05K2201/093 , H05K2201/09309 , H05K2201/09509 , H05K2201/09663 , H05K2201/09718
Abstract: A printed circuit board with embedded capacitors is manufactured by: forming a ground layer copper foil on an inner layer of the printed circuit board; coating a polymer capacitor paste (105a, 105b) having high-dielectric constant on the ground layer copper foil (104a, 104b); layering a power layer copper foil (106a, 106b); forming a dry film pattern and etching; layering an insulation layer-attached copper film; and forming and plating a blind via-hole and a through-hole. Manufacture of a printed circuit board with embedded capacitors comprises: forming a ground layer copper foil on an inner layer of a printed circuit board, followed by roughening a surface of the ground layer copper foil; coating a polymer capacitor paste having high-dielectric constant at a predetermined thickness on the ground layer copper foil, and curing the coated polymer capacitor paste; layering a power layer copper foil to the cured capacitor; forming a dry film pattern on the power layer copper foil, and etching the dry film pattern by use of an etching mask so that the power layer copper foil is partitioned; layering an insulation layer-attached copper film to the power layer copper foil; forming a blind via-hole and a through-hole at predetermined portions of the insulation layer-attached copper film; and plating the blind via-hole and the through-hole for layer connection.
Abstract translation: 具有嵌入式电容器的印刷电路板通过以下步骤制造：在印刷电路板的内层上形成接地层铜箔; 在所述接地层铜箔（104a，104b）上涂覆具有高介电常数的聚合物电容器浆料（105a，105b）; 分层功率层铜箔（106a，106b）; 形成干膜图案并蚀刻; 分层附有绝缘层的铜膜; 并形成并镀覆盲孔和通孔。 具有嵌入式电容器的印刷电路板的制造包括：在印刷电路板的内层上形成接地层铜箔，随后粗糙化接地层铜箔的表面; 在所述接地层铜箔上涂覆具有预定厚度的高介电常数的聚合物电容器浆料，并固化所述涂覆的聚合物电容器浆料; 将功率层铜箔层叠到固化的电容器上; 在功率层铜箔上形成干膜图案，并且通过使用蚀刻掩模来蚀刻干膜图案，使得功率层铜箔被分隔; 将具有绝缘层的铜膜层叠到功率层铜箔上; 在附着绝缘层的铜膜的预定部分形成盲孔和通孔; 并对盲孔和通孔进行镀层以进行分层连接。
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