22.
    发明专利
    未知

    公开(公告)号:DE10053171C2

    公开(公告)日:2003-02-06

    申请号:DE10053171

    申请日:2000-10-26

    Abstract: A method is described in which a metal oxide-containing layer is applied to a substrate and is then exposed to implantation with oxygen ions. A subsequent heat-treatment step can be carried out in an inert atmosphere and with shorter process times, since the oxygen is already present in the metal oxide-containing layer and, moreover, shorter diffusion paths are required for the oxygen to become intercalated in the crystal lattice of the metal oxide-containing layer. Therefore, adjacent layers, such as barrier layers, are less affected by the heat treatment.

    23.
    发明专利
    未知

    公开(公告)号:DE10000005C1

    公开(公告)日:2001-09-13

    申请号:DE10000005

    申请日:2000-01-03

    Abstract: A switching transistor (2) is formed on a semiconductor substrate (1). An insulating layer (4) is applied, with a first layer (5) preventing hydrogen ingress. A memory condenser coupled with the transistor is added. It includes a lower (7) and upper electrode (9), with intervening metal oxide-containing layer (8). In a vertical etching stage, the insulation layer outside the storage condenser is removed to a set depth, laying bare the first barrier layer. On the storage condenser, insulating layer and first barrier layer, a second barrier layer (10) is applied, especially blocking hydrogen ingress. Preferred etching methods and materials employed are claimed.

    24.
    发明专利
    未知

    公开(公告)号:DE10057806B4

    公开(公告)日:2007-10-11

    申请号:DE10057806

    申请日:2000-11-22

    Abstract: An integrated ferroelectric memory configuration and a method for producing the integrated ferroelectric memory configuration, in which memory cells are arranged using the stacking principle, and both capacitor electrodes, which are located one above the other, of each memory cell are directly electrically connected by means of contact plugs to corresponding source and drain regions of an associated selection transistor in the substrate. Contact plugs for the contact connection to the upper capacitor electrodes are produced from above the configuration.

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