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    31.
    发明专利
    未知

    公开(公告)号：DE10041685A1

    公开(公告)日：2002-03-21

    申请号：DE10041685

    申请日：2000-08-24

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： HARTNER WALTER ,  SCHINDLER GUENTHER ,  GABRIC ZVONIMIR

    IPC: H01L27/105 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/108 ,  H01L21/8239

    Abstract: Production of a microelectronic component comprises: (i) forming a storage capacitor containing a first electrode, a second electrode and a ferroelectric or paraelectric dielectric on a substrate; and (ii) forming a barrier on the capacitor to prevent the hydrogen passing through. The hydrogen barrier is produced by forming a silicon oxide layer (41), tempering the capacitor and at least a part of the silicon oxide layer, and applying a barrier layer (42) to the tempered silicon oxide layer. Preferred Features: At least a part of the barrier layer is applied in a hydrogen-free deposition process. A first partial layer of the barrier layer is initially applied followed by a second partial layer of silicon nitride. The silicon nitride layer is deposited using a low pressure microwave process. The silicon oxide layer has partial layers (411, 412).

    32.
    发明专利
    未知

    公开(公告)号：DE10000005C1

    公开(公告)日：2001-09-13

    申请号：DE10000005

    申请日：2000-01-03

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： KASTNER MARCUS ,  SCHINDLER GUENTHER ,  HARTNER WALTER ,  DEHM CHRISTINE

    IPC: H01L21/316 ,  H01L21/02 ,  H01L21/318 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/8239

    Abstract: A switching transistor (2) is formed on a semiconductor substrate (1). An insulating layer (4) is applied, with a first layer (5) preventing hydrogen ingress. A memory condenser coupled with the transistor is added. It includes a lower (7) and upper electrode (9), with intervening metal oxide-containing layer (8). In a vertical etching stage, the insulation layer outside the storage condenser is removed to a set depth, laying bare the first barrier layer. On the storage condenser, insulating layer and first barrier layer, a second barrier layer (10) is applied, especially blocking hydrogen ingress. Preferred etching methods and materials employed are claimed.

    34.
    发明专利
    未知

    公开(公告)号：DE502006006768D1

    公开(公告)日：2010-06-02

    申请号：DE502006006768

    申请日：2006-08-23

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ENGELHARDT MANFRED ,  STICH ANDREAS ,  SCHINDLER GUENTHER ,  SCHRENK MICHAEL

    IPC: H01G4/33 ,  H01G4/40 ,  H01L21/02 ,  H01L27/13

    Abstract: Capacitor has a capacitor electrode (E1) formed on a surface of an intermediate dielectric (1). Another intermediate dielectric (4) is formed on the intermediate dielectric (1) and includes an opening for exposing a part of the capacitor electrode. An electrically conductive diffusion-barrier layer (5) is formed on the surface of the capacitor electrode. Another capacitor electrode (E2) is formed on a surface of a capacitor dielectric (6) and includes only another electrically conductive diffusion-barrier layer (7). One of the capacitor electrodes includes titanium, tantalum, tantalum nitride and/or titanium nitride. An independent claim is also included for a method of manufacturing a metal-insulator-metal capacitor.

    37.
    发明专利
    未知

    公开(公告)号：DE102004050391A1

    公开(公告)日：2006-05-04

    申请号：DE102004050391

    申请日：2004-10-15

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHINDLER GUENTHER ,  PAMLER WERNER ,  GABRIC ZVONIMIR ,  UNGER EUGEN ,  TRAVING MARTIN ,  STEINLESBERGER GERNOT ,  STICH ANDREAS

    IPC: H01L21/768 ,  H05K3/00

    Abstract: In a method for manufacturing a layer arrangement, a plurality of electrically conductive structures are embedded in a substrate. Material of the substrate is removed at least between adjacent electrically conductive structures. An interlayer is formed on at least one portion of sidewalls of each of the electrically conductive structures. A first layer is formed on the interlayer where an upper partial region of the interlayer remaining free of a covering with the first layer. An electrically insulating second layer is formed selectively on that partial region of the interlayer which is free of the first layer, in such a way that the electrically insulating second layer bridges adjacent electrically conductive structures such that air gaps are formed between adjacent electrically conductive structures.

    40.
    发明专利
    未知

    公开(公告)号：DE10140754A1

    公开(公告)日：2003-03-27

    申请号：DE10140754

    申请日：2001-08-20

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHINDLER GUENTHER

    IPC: H01L21/768 ,  H01L23/522

    Abstract: An interconnect arrangement comprises a substrate made from a first insulating material with a substrate surface, at least two interconnects which are arranged next to one another in the substrate, a buffer layer made from a second insulating material above the substrate and comprising a buffer-layer surface, which is parallel to the substrate surface, at least one cavity, which is arranged between the interconnects and, with respect to the buffer-layer surface, extends deeper into the substrate than the interconnects, and a covering layer made from a third insulating material, which is arranged above the buffer layer and completely closes off the cavity with respect to the buffer-layer surface.

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