상변화 메모리 소자 및 그의 제조방법
    1.
    发明公开
    상변화 메모리 소자 및 그의 제조방법 无效
    相变存储器件及其制造方法

    公开(公告)号:KR1020090076597A

    公开(公告)日:2009-07-13

    申请号:KR1020080002636

    申请日:2008-01-09

    Abstract: A phase change memory device and a method of manufacturing the same are provided, which can prevent misalignment problem of the bottom electrode and diffusion stopper. The phase change memory device comprises the storage node and the switching element connected to the storage node. The storage node comprises electrode and phase-change layer(30). The diffusion stopper(20) includes the silicide compound between the electrode and phase-change layer. The silicide compound includes at least one among silicide, silicide oxide, and silicide nitride. The electrode is the bottom electrode(10).

    Abstract translation: 提供了一种相变存储器件及其制造方法,其可以防止底部电极和扩散塞的不对准问题。 相变存储器件包括存储节点和连接到存储节点的开关元件。 存储节点包括电极和相变层(30)。 扩散阻挡层(20)包括电极和相变层之间的硅化物。 硅化物化合物包括硅化物,硅化物氧化物和氮化硅中的至少一种。 电极是底部电极(10)。

    실리콘 나노닷 함유 실리카 나노 와이어 및 그의 제조방법
    2.
    发明公开
    실리콘 나노닷 함유 실리카 나노 와이어 및 그의 제조방법 有权
    包含硅纳米线的二氧化硅纳米线及其制备方法

    公开(公告)号:KR1020100007255A

    公开(公告)日:2010-01-22

    申请号:KR1020080067813

    申请日:2008-07-11

    Abstract: PURPOSE: A silicon nano wire containing silicon nano dot is provided to produce nano wire having improve various material property by controlling size, density, crystallization, and interval. CONSTITUTION: A silica nano wire contains silicon nano dot as a nano wire containing silica. The nano wire containing the silica comprises a core portion. The core portion contains silicon-rich oxide or metal nano dot. The silicon nano dot exists inside the nano wire except for the core portion. The diameter of the silicon nano dot is 1-10nm.

    Abstract translation: 目的:提供含有硅纳米点的硅纳米线,以通过控制尺寸,密度,结晶度和间隔来制备具有改善各种材料性能的纳米线。 构成:二氧化硅纳米线含有硅纳米点作为含有二氧化硅的纳米线。 含有二氧化硅的纳米线包括核心部分。 芯部分含有富含氧的氧化物或金属纳米点。 硅纳米点存在于纳米线内,除了核心部分之外。 硅纳米点的直径为1-10nm。

    CMOS 반도체 소자 및 그 제조방법
    3.
    发明公开
    CMOS 반도체 소자 및 그 제조방법 有权
    CMOS半导体器件及其制造方法

    公开(公告)号:KR1020080079940A

    公开(公告)日:2008-09-02

    申请号:KR1020070020593

    申请日:2007-02-28

    CPC classification number: H01L29/517 H01L21/28088 H01L21/823842 H01L29/4966

    Abstract: A CMOS semiconductor device and a manufacturing method thereof are provided to prevent reduction of performance by eliminating a reaction between heterogeneous materials. A CMOS semiconductor device includes an nMOS region and a pMOS region. A gate including a poly-Si capping layer(5) and a metal nitride layer(3a,3b) deposited under the poly-Si capping layer are formed in the nMOS region and the pMOS region, respectively. A gate insulating layer(2) is formed in a lower part of each gate of the nMOS region and the pMOS region. The metal nitride layers of the nMOS region and the pMOS region are made of a homogeneous material. The metal nitride layers of the nMOS region and the pMOS region has different work functions according to a concentration difference of impurities.

    Abstract translation: 提供CMOS半导体器件及其制造方法,以通过消除异质材料之间的反应来防止性能降低。 CMOS半导体器件包括nMOS区和pMOS区。 在nMOS区域和pMOS区域分别形成包括多晶硅覆盖层(5)和沉积在多晶硅覆盖层下方的金属氮化物层(3a,3b)的栅极。 栅极绝缘层(2)形成在nMOS区域和pMOS区域的每个栅极的下部。 nMOS区域和pMOS区域的金属氮化物层由均质材料制成。 根据杂质的浓度差,nMOS区域和pMOS区域的金属氮化物层具有不同的功函数。

    비휘발성 메모리 소자 및 그 제조방법
    5.
    发明公开
    비휘발성 메모리 소자 및 그 제조방법 失效
    非易失性存储器件及其制造方法

    公开(公告)号:KR1020080097006A

    公开(公告)日:2008-11-04

    申请号:KR1020070042057

    申请日:2007-04-30

    Abstract: A non-volatile memory device is provided to have the excellent electron storage capability by including the nano dots. The manufacturing method of the non-volatile memory device includes the step of forming the tunnel insulating layer(110) in the top of the substrate; the step of forming the charge storage layer(127) including the lanthanide nano dots(125) on the tunnel insulating layer; the step of forming the control gate layer on the charge storage layer; the step of forming a gate stack by patterning the control gate layer and the charge storage layer.

    Abstract translation: 提供非易失性存储器件以通过包括纳米点具有优异的电子存储能力。 非易失性存储器件的制造方法包括在衬底的顶部形成隧道绝缘层(110)的步骤; 在隧道绝缘层上形成包含镧系元素纳米点(125)的电荷存储层(127)的步骤; 在电荷存储层上形成控制栅极层的步骤; 通过图案化控制栅极层和电荷存储层来形成栅极堆叠的步骤。

    미엘린 막을 채용하는 트랜지스터
    8.
    发明公开
    미엘린 막을 채용하는 트랜지스터 有权
    晶体管使用髓鞘层作为栅极绝缘体

    公开(公告)号:KR1020110045257A

    公开(公告)日:2011-05-04

    申请号:KR1020090101733

    申请日:2009-10-26

    Abstract: PURPOSE: A transistor using a myelin layer is provided to form a gate insulating film, thereby operating a transistor with a low voltage. CONSTITUTION: A gate insulating film(130) includes a myelin layer. The gate insulating film is adjacent to a gate(120). A channel layer(140) is separated from the gate by the gate insulating film. The channel layer is formed of an organic semiconductor. A source(150) and a drain(160) are formed on both sides of the channel layer.

    Abstract translation: 目的:提供使用髓磷脂层的晶体管以形成栅极绝缘膜,从而操作具有低电压的晶体管。 构成:栅绝缘膜(130)包括髓鞘层。 栅极绝缘膜与栅极(120)相邻。 沟道层(140)通过栅极绝缘膜与栅极分离。 沟道层由有机半导体形成。 源极(150)和漏极(160)形成在沟道层的两侧。

    메모리 장치의 제조 방법
    9.
    发明公开
    메모리 장치의 제조 방법 无效
    制造方法存储器件

    公开(公告)号:KR1020100100550A

    公开(公告)日:2010-09-15

    申请号:KR1020090025989

    申请日:2009-03-26

    Abstract: PURPOSE: A method for manufacturing a memory device is provided to prevent the leakage current of a blocking dielectric film by suppressing the interfacial reaction of an silicon oxide in a first dielectric film and an aluminum oxide in a third dielectric film. CONSTITUTION: A tunnel dielectric film(110) is formed on a substrate(10). An electric charge trapping film(120) is formed on the tunnel dielectric film. A blocking dielectric film(130) is formed on the electric charge trapping film. A first dielectric film(131) including a silicon oxide is formed on the electric charge trapping film. A second dielectric film(133) including an aluminum silicate is formed on the first dielectric film. A third dielectric layer(135) including an aluminum oxide is formed on the second dielectric film.

    Abstract translation: 目的:提供一种用于制造存储器件的方法,通过抑制第三绝缘膜中的第一电介质膜和氧化铝中的氧化硅的界面反应来防止阻挡电介质膜的漏电流。 构成:在衬底(10)上形成隧道电介质膜(110)。 在隧道电介质膜上形成电荷捕获膜(120)。 在电荷捕获膜上形成阻挡电介质膜(130)。 在电荷捕获膜上形成包括氧化硅的第一电介质膜(131)。 在第一电介质膜上形成包括硅酸铝的第二电介质膜(133)。 在第二电介质膜上形成包括氧化铝的第三电介质层(135)。

    전자소자용 보호막 및 이를 구비하는 유기발광 표시장치
    10.
    发明公开
    전자소자용 보호막 및 이를 구비하는 유기발광 표시장치 无效
    电子设备和有机发光显示器件的钝化膜

    公开(公告)号:KR1020090030083A

    公开(公告)日:2009-03-24

    申请号:KR1020070095411

    申请日:2007-09-19

    Abstract: A passivation film for electronic device and organic light emitting display device are provided to increase the lifetime by forming the protective film with the plastic film / myeline layer. The myeline layer(221) functions as the protective film for protecting the organic light-emitting device(210). The organic light-emitting device comprises the top emission type organic light-emitting device and bottom emission type organic light-emitting device. The organic light-emitting device is driven to the active matrix mode or the passive matrix mode. The organic light-emitting device comprises the anode electrode(211) successively laminated on the top of the substrate, and the light-emitting layer(215) and cathode electrode(219). The light-emitting layer emitting the light of the predetermined color is formed between the anode electrode and cathode electrode. The hole injection layer(213) is formed between the anode electrode and light-emitting layer.

    Abstract translation: 提供电子器件用钝化膜和有机发光显示器件,通过用塑料膜/线层形成保护膜来延长使用寿命。 线层(221)用作保护有机发光器件(210)的保护膜。 有机发光器件包括顶部发射型有机发光器件和底部发射型有机发光器件。 有机发光器件被驱动到有源矩阵模式或无源矩阵模式。 有机发光装置包括依次层叠在基板顶部的阳极电极(211)和发光层(215)和阴极电极(219)。 在阳极电极和阴极之间形成发射预定颜色的光的发光层。 在阳极电极和发光层之间形成空穴注入层(213)。

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