HIGH VOLTAGE FINAL OUTPUT STAGE
    121.
    发明专利

    公开(公告)号:JPH11205122A

    公开(公告)日:1999-07-30

    申请号:JP31113198

    申请日:1998-10-30

    Abstract: PROBLEM TO BE SOLVED: To combine a voltage shift driving circuit having the functional and constitutional features usable by both high voltage and low voltage and capable of reducing the area of a circuit further with a final output stage for supplying power to a load. SOLUTION: In this high voltage final output stage for electric load driving which is constituted of a pair of the transistors of complementary combination connected between a first reference power source (Vdd) and a second reference power source (Vss) and in which the pair of the transistors are constituted by connecting in series at least one PMOS pull-up transistor (MP1) to an NMOS pull-down transistor (MN), an additional PMOS transistor (MP2) is connected in parallel to the PMOS pull-up transistor (MP1) and its body terminal is made to be in common with the PMOS pull-up transistor (MP1).

    STEP-UP DC-DC CONVERTER
    122.
    发明专利

    公开(公告)号:JPH11196566A

    公开(公告)日:1999-07-21

    申请号:JP28790598

    申请日:1998-10-09

    Abstract: PROBLEM TO BE SOLVED: To provide a step-up continuous mode DC-DC converter with integrated fuzzy logic current control. SOLUTION: A step-up continuous mode DC-DC converter 1 with integrated current control includes comparators 3 and 6 which compare voltage signals outputted by the converter 1 with reference signals in order to generate a deviation signal and a circuit which generates a compensation ramp suitable for generating a ramp signal 7 added to a signal proportional to a current ramp flowing through the converter 1. A signal outputted from the comparator 3 and a signal obtained by the addition of the ramp signal 7 are supplied to the next comparator 6 whose output is transmitted to a means together with an oscillator signal for driving a power transistor in the converter 1. The converter 1 further includes a fuzzy logic control means 11 provided between the comparator 3 and the next comparator 6. The fuzzy logic control means 11 receives the deviation signal outputted by the comparator 3 as an input and outputs a signal which depends upon the hourly change of the deviation signal and is inputted to the next comparator 6.

    OUTPUT CIRCUIT FOR INTEGRATED CIRCUIT

    公开(公告)号:JPH11195715A

    公开(公告)日:1999-07-21

    申请号:JP29938198

    申请日:1998-10-21

    Abstract: PROBLEM TO BE SOLVED: To reduce the effects of noise exerted to an input stage and internal circuit of an integrated circuit by an output stage of the integrated circuit. SOLUTION: An output stage for an integrated circuit is provided with a first transistor means P2 and a second transistor means N2, serially connected between a first external voltage Vcc and a second external voltage Gnd on the outside of the integrated circuit 100 respectively, through a first and a second electric connection means L2 and L4. The first transistor means P2 transmits the first external voltage Vcc to an output line 5 of the integrated circuit, and the second transistor means N2 transmits the second external voltage Gnd to the output line 5 of the integrated circuit. The second transistor means N2 is formed inside a first well 130 of a first conductivity type provided inside a second well 140 of a second conductivity type formed inside a substrate 7 of the first conductivity type. The second well 140 of the second conductive type is connected through a third electric connection means L21 which is different from the first electric connection means L2 to the first external voltage Vcc.

    MODULE STRUCTURE PET DECODER FOR ATM COMMUNICATION NETWORK

    公开(公告)号:JPH11163740A

    公开(公告)日:1999-06-18

    申请号:JP24923098

    申请日:1998-09-03

    Abstract: PROBLEM TO BE SOLVED: To provide a device that is integratable simply, with a hardware suitable for multimedia applications and realizes priority encoding transmission PET. SOLUTION: This PET decoder for an ATM communication network has a modular structure, consisting of a processing unit(PU) that is made up of a memory means comprising a ROM and a SRAM and a processing pipeline section (build_A, LU_dec, find_Y, find_X) that generates a square matrix A, based on a vector D at a relating point in a Galois field (GF [p]) from m-data blocks in a prescribed bit number and applies factorization to the elements of the matrix A by trigonometric factorization, and solves the sub components of an arithmetic formula through simple substitution. The PET decoder also has a control unit(CU) that interfaces the ATM communication network with a programmable parallel processor.

    TWO DIMENSIONAL POSITION SENSOR AND CONTROL DEVICE FOR VEHICLE

    公开(公告)号:JPH1183418A

    公开(公告)日:1999-03-26

    申请号:JP14780098

    申请日:1998-05-28

    Abstract: PROBLEM TO BE SOLVED: To provide a two dimensional sensor particularly for car, which comprises a permanent magnet moving while facing plural sensor elements to detect a magnetic field. SOLUTION: A permanent magnet 3 is freely movable on a plane along the first and second directions, which do not coincide with each other, and is fixed to a control lever so as to freely rotate around the third direction perpendicular to the plane as the center. The permanent magnet 3 is freely movable relative to an accumulation device 2 composed of the first group partitioned along the first direction, the second group partitioned along the second direction and a sensor element 10 of the third group to detect an angle position of the permanent magnet 3. An electronic equipment integrated with the sensor unit 10 produces a code relative to a position movement of the permanent magnet 3, and generates a control signal corresponding to a required function.

    ROTOR POSITION DETECTION METHOD OF BRUSHLESS MOTOR

    公开(公告)号:JPH1175388A

    公开(公告)日:1999-03-16

    申请号:JP19939898

    申请日:1998-07-15

    Abstract: PROBLEM TO BE SOLVED: To realize a rotor position detection system of a multiphase brushless DC motor which is driven with a mode of supplying power to all phase windings. SOLUTION: In the rotor position detection method of a multiphase brushless motor which is driven with a multipole mode and has a zero-cross detection circuit for induction signals in phase windings, the driving signal in the phase winding of the motor which is connected to the zero-cross detection circuit is interrupted by using a 1st logic command (ENABLE). At a certain lapse of time after the start of the interruption, a logic gate which recognizes the zero-cross detected by the zero-cross detection circuit is enabled by using a 2nd logic command (MAK). Then, at a certain lapse of time after the start of the interruption, both the logic commands (ENABLE and MASK) are reset.

    CONTROLLABLE FREQUENCY OSCILLATOR
    129.
    发明专利

    公开(公告)号:JPH1174765A

    公开(公告)日:1999-03-16

    申请号:JP17473498

    申请日:1998-06-22

    Abstract: PROBLEM TO BE SOLVED: To operate with power supply voltage that is lower than normal power supply voltage by configuring a connection circuit means with a differential amplifier which has a differential output terminal that is connected to the bases of two transistors respectively. SOLUTION: A balanced differential amplifier is provided between two transistors Q1 and Q2 as a connecting means for positive feedback. The differential amplifier has two npn transistors T3 and T4, interconnects their emitters, also connects its current Ip to a ground terminal through a current source G5 which is adjusted by the voltage of a control terminal SW, connects their collectors to a power supply terminal Vcc through respectively different resistance R3 and R4 and connects their bases to the collectors of the transistors Q2 and Q1 respectively. The collectors of the transistors T3 and T4 are further connected to bases of the transistors Q2 and Q1 respectively and also each collector can be taken out as an output terminal Vout of this oscillator.

    MANUFACTURE OF SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:JPH1174490A

    公开(公告)日:1999-03-16

    申请号:JP17749698

    申请日:1998-06-24

    Abstract: PROBLEM TO BE SOLVED: To provide a simple manufacturing method of a semiconductor memory device having storage memory cells and shielded memory cells shielded so as to prevent their stored informations from being read out by external systems. SOLUTION: In the same chip made of semiconductor materials, there are formed at least one first memory cells each of which has a MOS transistor with overlapping first and second gates with each other formed respectively in first and second conductive material layers 12, 17 and at least one second memory cells each of which is so shielded by a shield material layer 32 that no external system can access to its storing information. This second memory cell comprises a MOS transistor having a floating gate formed of the first conductive material layer 12 simultaneously with the foregoing first gate electrode of the foregoing first memory cell, and the shield material layer 32 is formed of the second conductive material layer 17.

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