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公开(公告)号：KR101013434B1
公开(公告)日：2011-02-14
申请号：KR1020080029203
申请日：2008-03-28
Applicant: 성균관대학교산학협력단
Abstract: 본 발명은 전자파 차폐필터의 제조방법 및 전자파 차폐필터의 구조에 관한 것으로, 본 발명에 따른 전자파 차폐필터의 제조방법은, 절연되는 투명재질을 가지며, 상부면에 일정깊이 및 일정폭으로 메쉬(mesh) 구조의 리세스(recess)가 형성된 베이스 기판을 형성하는 단계와; 상기 베이스 기판의 상부면에 제1도전물질을 증착하여 제1도전막을 형성하는 단계와; 상기 베이스 기판을 일정각도로 기울인 상태에서 회전상태로 드라이 에칭공정을 실시하여, 상기 리세스의 바닥면과 측면 일부, 또는 상기 리세스의 바닥면을 제외한 나머지 부분의 상기 제1도전막을 제거하는 단계와; 상기 리세스의 바닥면에 남아있는 상기 제1도전막을 시드층(seed layer)으로 하여, 제2도전물질이 상기 리세스의 내부를 채우도록 전기도금공정을 수행하는 단계를 구비한다. 본 발명에 따르면, 별도의 포토공정이 없이 베이스 기판을 기울여서 에칭공정을 수행하고 전기도금 공정을 수행함에 의해 간단하면서도 질적으로 우수한 전자파 차폐필터를 제조할 수 있는 효과가 있다.
전자파, 차폐, 필터, 임프린트, 전기도금, 이온에칭-
公开(公告)号：KR1020100135469A
公开(公告)日：2010-12-27
申请号：KR1020090053852
申请日：2009-06-17
Applicant: 성균관대학교산학협력단
Abstract: PURPOSE: A high resistance cermet resistor and a forming method thereof are provided to prevent hypoxia by selectively performing anodizing process after a deposition process. CONSTITUTION: A first photoresist pattern is formed on a substrate(10). A metal electrode(30) is deposited on the front of a substrate. A first photo resistor pattern is removed from the substrate. A second photo resist pattern is formed on the substrate without a resistor formation position. A mixture is deposited on the front of the substrate and is made of active material and stable metal. A cermet resistor(60) is formed by anodizing the mixture. A second photoresist pattern is removed from the substrate.
Abstract translation: 目的：提供高电阻金属陶瓷电阻器及其形成方法，以在沉积工艺之后选择性地进行阳极氧化处理来防止缺氧。 构成：在衬底（10）上形成第一光致抗蚀剂图案。 金属电极（30）沉积在基板的前面。 从衬底去除第一光电阻图案。 在基板上形成第二光刻胶图案，而不形成电阻器形成位置。 混合物沉积在基材的前面，并由活性材料和稳定的金属制成。 通过阳极氧化混合物形成金属陶瓷电阻（60）。 从衬底去除第二光致抗蚀剂图案。
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公开(公告)号：KR1020090124700A
公开(公告)日：2009-12-03
申请号：KR1020080051056
申请日：2008-05-30
Applicant: 성균관대학교산학협력단
IPC: H01L21/28
CPC classification number: Y02P80/30 , H01L21/76873 , H01L21/2885 , H01L21/76865
Abstract: PURPOSE: A fabrication method of electrode for selective plating process is provided to selectively form the plating electrode on the groove by removing the seed layer. CONSTITUTION: The metal seed layer(20) is formed in the substrate(10) surface in which groove is formed. The roller(30) is close to the surface of the substrate in which the metal seed layer is formed to remove the metal seed layer. The roller is arranged in the upper side and lower side of the substrate. The distance between the up-down rollers can be controlled. The speed of rotation of roller can be controlled. The material of roller is rubber.
Abstract translation: 目的：提供一种用于选择性电镀工艺的电极的制造方法，通过去除种子层来选择性地在沟槽上形成电镀电极。 构成：金属种子层（20）形成在形成有槽的基板（10）表面中。 辊（30）靠近形成有金属种子层的基板的表面以去除金属种子层。 辊布置在基板的上侧和下侧。 可以控制上下辊之间的距离。 可以控制滚筒的旋转速度。 辊子的材料是橡胶。
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公开(公告)号：KR1020090098538A
公开(公告)日：2009-09-17
申请号：KR1020080023992
申请日：2008-03-14
Applicant: 성균관대학교산학협력단
IPC: C25D3/38
CPC classification number: C25D3/38
Abstract: A method for releasing deposit stress in Cu electroplating and a Cu plating bath using the same are provided to remove electroplating stress generated on a Cu deposition layer by applying an additive to the Cu plating bath for electroplating. A method for releasing deposit stress in Cu electroplating comprises the steps of preparing a cathode and an anode and a Cu plating bath, applying an additive for releasing electroplating stress to the Cu plating bath, dipping the cathode and the anode in the Cu plating bath, applying direct current density of 20mA/cm^2 between the anode and the cathode at the room temperature, and performing Cu electroplating until the thickness of the deposited copper has reached about 5~6mum. The additive includes thiourea of 0.0002~0.0006M. The Cu plating bath is mainly composed of copper sulfate and copper.
Abstract translation: 提供了一种用于释放Cu电镀中的沉积应力的方法和使用其的Cu电镀浴，以通过向用于电镀的Cu电镀浴中施加添加剂来除去在Cu沉积层上产生的电镀应力。 一种用于在Cu电镀中释放沉积应力的方法包括以下步骤：制备阴极和阳极以及镀铜浴，向Cu镀浴施加用于释放电镀应力的添加剂，将阴极和阳极浸入Cu镀浴中， 在室温下在阳极和阴极之间施加20mA / cm 2的直流电流密度，并执行Cu电镀，直到沉积的铜的厚度达到约5〜6μm。 添加剂包括0.0002〜0.0006M的硫脲。 镀铜浴主要由硫酸铜和铜组成。
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公开(公告)号：KR1020090084216A
公开(公告)日：2009-08-05
申请号：KR1020080010260
申请日：2008-01-31
Applicant: 성균관대학교산학협력단
Abstract: A coating method and a coating apparatus of a LIGA process are provided to shorten the entire process of the LIGA process and to save manufacturing cost because the coating speed during the LIGA process is shortened. A coating method of a LIGA process is as follows. The resist structure formed owing to the detailed picture process and the first and the second electrode are arranged within the plating liquid in which the disperse particle is suspended (S1). The resist structure is connected to the first electrode. The dispersed particles are together attached to the surface of the resist structure with the ion particles within the plating liquid with the keen in the co-deposition by authorizing current in the first and the second electrode.
Abstract translation: 提供LIGA方法的涂布方法和涂布装置，以缩短LIGA工艺的整个过程并节省制造成本，因为LIGA工艺期间的涂布速度缩短。 LIGA方法的涂布方法如下。 由于详细的图像处理形成的抗蚀剂结构和第一和第二电极被布置在悬浮分散粒子的电镀液中（S1）。 抗蚀剂结构连接到第一电极。 通过在第一和第二电极中授权电流，分散的颗粒通过在电镀液中的离子颗粒一起附着在抗蚀剂结构的表面上，并且通过共沉积中的敏感性。
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Patent Agency Ranking
公开(公告)号：KR1020090065985A
公开(公告)日：2009-06-23
申请号：KR1020070133560
申请日：2007-12-18
Applicant: 성균관대학교산학협력단
IPC: G02F1/136 , G02F1/1345
CPC classification number: G02F1/1335 , G02F1/136 , H01L2224/80031
Abstract: A manufacturing method of a COG(Chip On Glass) substrate using anode oxidation is provided to perform an anode oxidation process on the surface of the COG substrate, thereby having no need of separate insulating layer formation or an etching process after the formation of a circuit pattern. An aluminum layer is formed on the surface of a glass substrate(S1). A photoresist pattern is formed on the surface of the aluminum layer(S2). The aluminum layer is selectively anodized by the photoresist pattern(S3). A metal layer is selectively coated in the surface of the aluminum layer according to a pattern after removing the photoresist pattern(S4).
Abstract translation: 提供使用阳极氧化的COG（玻璃上芯片）基板的制造方法，以在COG基板的表面上进行阳极氧化处理，从而在形成电路之后不需要单独的绝缘层形成或蚀刻工艺 模式。 在玻璃基板的表面上形成铝层（S1）。 在铝层的表面上形成光刻胶图案（S2）。 通过光致抗蚀剂图案选择性地阳极氧化铝层（S3）。 在除去光致抗蚀剂图案之后，根据图案将金属层选择性地涂覆在铝层的表面中（S4）。
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公开(公告)号：KR100901017B1
公开(公告)日：2009-06-04
申请号：KR1020070102536
申请日：2007-10-11
Applicant: 성균관대학교산학협력단
IPC: H01L21/027 , H01L21/288
Abstract: 본 발명에 의한 기판의 금속패턴 형성방법은, 기판의 표면에 패턴을 형성하는 패턴 형성단계; 상기 기판 표면의 거칠기를 높이는 거칠기 정도 증가 단계; 및 상기 거칠기 정도 증가 단계에 의해 거칠기가 향상된 기판의 표면에 금속재질을 도금하여 선택적인 금속패턴을 형성하는 선택적 금속패턴 형성단계를 포함한다.
금속패턴, 기판, 거칠기, 샌드, 패턴-
公开(公告)号：KR100878916B1
公开(公告)日：2009-01-15
申请号：KR1020070094273
申请日：2007-09-17
Applicant: 삼성전기주식회사 , 성균관대학교산학협력단
CPC classification number: H01L2224/11 , H01L2924/3651
Abstract: A solder bump is provided to prevent mechanical strength of the solder bump from decreasing by sequentially forming a copper post, silver plating layers and tin plating layers, thereby suppressing the production of Ag3Sn that is an intermetallic compound produced on an interface of the copper post and a solder. A solder bump(30) comprises a copper post(2), silver plating layers(4,8), and tin plating layers(6,10). The copper post is formed on a metal layer(12) forming an electronic component through the electroplating process. The silver plating layers and tin plating layers are sequentially formed on the copper post. The metal layer means a circuit pattern formed on a printed circuit board or a wafer level package. The solder bump further comprises a gold plating layer(14) formed between the metal layer and the copper post.
Abstract translation: 提供了一种焊料凸块以通过顺序地形成铜柱，镀银层和镀锡层来防止焊料凸块的机械强度降低，由此抑制作为在铜柱的界面上产生的金属间化合物的Ag 3 Sn的产生 焊锡 焊料凸块（30）包括铜柱（2），镀银层（4,8）和镀锡层（6,10）。 铜柱通过电镀工艺形成在形成电子部件的金属层（12）上。 镀铜层和镀锡层依次形成在铜柱上。 金属层是指形成在印刷电路板或晶片级封装上的电路图案。 焊料凸块还包括形成在金属层和铜柱之间的镀金层（14）。
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公开(公告)号：KR1020090004180A
公开(公告)日：2009-01-12
申请号：KR1020070068182
申请日：2007-07-06
Applicant: 시게이트 테크놀로지 엘엘씨 , 성균관대학교산학협력단
IPC: G03F7/00 , G11B5/86 , G03F1/50 , H01L21/027
CPC classification number: G03F7/0017 , G03F7/0002 , G03F7/0022 , G03F7/161 , G03F7/2012 , G11B5/865 , H01L21/0274 , H01L21/0337
Abstract: An anodized aluminum template, a method for preparing the anodized aluminum template, and a method for preparing a nanohole stamp by using the anodized aluminum template are provided to form the nanohole having the more regular arrangement. An anodized aluminum template(200) comprises an aluminum film(110); a guide line pattern which is formed on the aluminum film; and a porous aluminum oxide(120, 130) which is formed along the guide line pattern on the aluminum film and constitutes a plurality of nanoholes(h).
Abstract translation: 提供阳极氧化铝模板，用于制备阳极氧化铝模板的方法，以及通过使用阳极氧化铝模板制备纳米孔印模的方法，以形成具有更规则排列的纳米孔。 阳极氧化铝模板（200）包括铝膜（110）; 形成在铝膜上的引导线图案; 以及沿着铝膜上的引导线图案形成并构成多个纳米孔（h）的多孔氧化铝（120,130）。
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公开(公告)号：KR101783112B1
公开(公告)日：2017-10-23
申请号：KR1020150181537
申请日：2015-12-18
Applicant: 성균관대학교산학협력단
Inventor： 서수정 , 박화선 , 박정갑 , 조영래 , 김태유 , 나영일 , 신진하 , 이정우 , 박정호 , 안병욱 , 백승빈 , 윤숙영 , 김선우 , 김석훈 , 박종환 , 송영일 , 신세희
Abstract: 적층커패시터가개시된다. 적층커패시터는제1 금속층및 이의일면상에배치된제1 유전체층을각각구비하는제1 박막구조체들및 이들과교대로적층되고각각제2 금속층및 이의일면상에배치된제2 유전체층구비하는제2 박막구조체들을구비하는커패시터적층구조체; 커패시터적층구조체의제1 및제2 측면상에각각배치되고제2 금속층들및 제1 금속층들과각각접촉하는제1 공통전극및 제2 공통전극을구비한다.
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