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公开(公告)号:CN108155168A
公开(公告)日:2018-06-12
申请号:CN201810140687.7
申请日:2014-12-05
Applicant: 英飞凌科技奥地利有限公司
IPC: H01L23/488 , H01L29/20 , H01L29/78 , H01L21/331 , H01L21/329 , H01L21/335
CPC classification number: H01L24/02 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L29/2003 , H01L29/6609 , H01L29/66325 , H01L29/66431 , H01L29/78 , H01L2224/0603 , H01L2224/37124 , H01L2224/37139 , H01L2224/37144 , H01L2224/37147 , H01L2224/37155 , H01L2224/40095 , H01L2224/40227 , H01L2224/40245 , H01L2224/4103 , H01L2224/48091 , H01L2224/48111 , H01L2224/48137 , H01L2224/49111 , H01L2224/73221 , H01L2224/84801 , H01L2924/00014 , H01L2924/1032 , H01L2924/13055 , H01L2924/13091 , H01L2924/15724 , H01L2924/15747 , H01L2924/00 , H01L2224/45099
Abstract: 本发明涉及电子器件。该电子器件包括在单个壳体中的多个半导体芯片。这样的半导体芯片可以包括不同的半导体材料,例如它们可以包括GaN。使用键合夹片而不是键合线是将这样的半导体芯片连接到衬底的高效方式。
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公开(公告)号:CN107123630A
公开(公告)日:2017-09-01
申请号:CN201710095392.8
申请日:2017-02-22
Applicant: 德克萨斯仪器股份有限公司
Inventor: G·T·奥斯特洛维奇
IPC: H01L23/488 , H01L25/07 , H01L21/60
CPC classification number: H01L23/49575 , H01L23/3121 , H01L23/492 , H01L23/49541 , H01L23/49551 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/73 , H01L25/074 , H01L2224/06181 , H01L2224/291 , H01L2224/32245 , H01L2224/33181 , H01L2224/37011 , H01L2224/37013 , H01L2224/37147 , H01L2224/40245 , H01L2224/73213 , H01L2224/73263 , H01L2224/83801 , H01L2224/84801 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/1033 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/014 , H01L2924/00014 , H01L25/072 , H01L23/488 , H01L24/72
Abstract: 一种功率变换器(300)具有导电地堆叠在附连到衬底(301)的第二晶体管芯片(320)的顶部上的第一晶体管芯片(310)。第一金属夹(360)具有板部分(360a)以及从板部分弯曲一定角度的脊部分(360c)。该板部分被附连到与第二晶体管芯片相对的第一晶体管的端子。该脊部分延伸到衬底并被配置为多个平行笔直的指状物(360d)。每个指状物使用附连材料(361)(例如焊料)离散地附连到衬底,并且可操作为弹簧线悬臂梁以便在位于衬底平面中的力下适应基于固有材料特性的弹性伸长。
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公开(公告)号:CN104425429B
公开(公告)日:2017-08-11
申请号:CN201410432996.3
申请日:2014-08-28
Applicant: 英飞凌科技股份有限公司
Inventor: 吴国财
IPC: H01L23/495 , H01L25/07 , H01L21/50 , H01L21/60
CPC classification number: H01L23/49575 , H01L23/13 , H01L23/49503 , H01L23/49513 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/89 , H01L25/0652 , H01L2224/291 , H01L2224/2919 , H01L2224/32014 , H01L2224/32105 , H01L2224/32145 , H01L2224/32237 , H01L2224/32257 , H01L2224/33181 , H01L2224/33505 , H01L2224/371 , H01L2224/37599 , H01L2224/40101 , H01L2224/40137 , H01L2224/45014 , H01L2224/45015 , H01L2224/48101 , H01L2224/48137 , H01L2224/49096 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15153 , H01L2924/00 , H01L2924/014 , H01L2924/07802 , H01L2924/0781 , H01L2924/00012 , H01L2224/45099
Abstract: 一种包括组块的半导体封装,具有第一侧,与第一侧相对的第二侧,以及从第二侧朝向第一侧延伸的凹陷区域,使得组块在凹陷区域中具有较薄部分并且在凹陷区域之外具有较厚部分。半导体封装进一步包括每一个具有相对的第一和第二侧的第一半导体裸片和第二半导体裸片。第一半导体裸片布置在组块的凹陷区域中并且在第一半导体裸片的第一侧处附接至组块的较薄部分。第二半导体裸片在第二半导体裸片的第一侧处附接至第一半导体裸片的第二侧。
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公开(公告)号:CN103843122B
公开(公告)日:2017-04-05
申请号:CN201180073865.5
申请日:2011-09-30
Applicant: 瑞萨电子株式会社
IPC: H01L21/60 , H01L21/822 , H01L25/065 , H01L25/07 , H01L25/18 , H01L27/04
CPC classification number: H01L25/072 , H01L21/8213 , H01L23/3107 , H01L23/3142 , H01L23/4952 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L23/5384 , H01L23/5386 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/34 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0207 , H01L27/0617 , H01L27/088 , H01L29/1066 , H01L29/1608 , H01L29/78 , H01L29/7802 , H01L29/808 , H01L29/8083 , H01L2224/04034 , H01L2224/04042 , H01L2224/05554 , H01L2224/0603 , H01L2224/291 , H01L2224/29139 , H01L2224/2919 , H01L2224/32145 , H01L2224/32245 , H01L2224/3701 , H01L2224/3702 , H01L2224/371 , H01L2224/37147 , H01L2224/40105 , H01L2224/40145 , H01L2224/40245 , H01L2224/40247 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49111 , H01L2224/49113 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2924/00014 , H01L2924/01029 , H01L2924/10253 , H01L2924/10272 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/181 , H01L2924/1815 , H01L2924/30107 , H01L2924/014 , H01L2924/00012 , H01L2224/48227 , H01L2924/00 , H01L2224/84
Abstract: 提供一种能够提高半导体器件的可靠性的技术。在本发明中,形成在半导体芯片(CHP1)的表面的栅极焊盘(GPj)以相较于其他引线(漏极引线(DL)和栅极引线(GL))更靠近源极引线(SL)的方式配置。其结果为,根据本发明,能够缩短栅极焊盘(GPj)与源极引线(SL)之间的距离,因此,能够缩短连接栅极焊盘(GPj)和源极引线(SL)的导线(Wgj)的长度。由此可知,根据本发明,能够充分地降低存在于导线(Wgj)的寄生电感。
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公开(公告)号:CN105283956A
公开(公告)日:2016-01-27
申请号:CN201480033379.4
申请日:2014-04-11
Applicant: 德克萨斯仪器股份有限公司
CPC classification number: H01L23/49575 , H01L21/50 , H01L21/561 , H01L23/49524 , H01L23/49562 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/84 , H01L24/97 , H01L25/0657 , H01L25/072 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2224/29101 , H01L2224/32245 , H01L2224/37147 , H01L2224/40095 , H01L2224/40137 , H01L2224/40139 , H01L2224/40145 , H01L2224/40245 , H01L2224/45014 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/83191 , H01L2224/84801 , H01L2224/8484 , H01L2224/8485 , H01L2924/00014 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/1301 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/15724 , H01L2924/15747 , H01L2924/1576 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/01028 , H01L2924/014 , H01L2924/20752
Abstract: 本发明涉及一种封装的多路输出转换器(200),其包括:具有作为接地终端的芯片焊盘(201)和包括电输入终端(203)的多条引线(202)的引线框架;复合第一FET芯片(同步芯片,220),其源极终端附连到引线框架,并且在其相对的表面上第一漏极终端(221)临近第二漏极终端(222)被设置,该漏极终端分别通过第一(241)和第二(242)金属线夹连接到第一(204)和第二(205)输出引线;第二FET芯片(控制芯片,211),其竖直地设置在第一漏极终端上并且其源极终端附连到第一线夹上;第三FET芯片(控制芯片,212),其竖直地设置在第二漏极终端上并且其源极终端附连到第二线夹上;并且第二和第三芯片的漏极终端(213,214)附连到第三金属线夹(260)上,该第三金属线夹(260)连接到输入引线(203)。
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公开(公告)号:CN103035631B
公开(公告)日:2015-07-29
申请号:CN201110310147.7
申请日:2011-09-28
Applicant: 万国半导体(开曼)股份有限公司
IPC: H01L25/07 , H01L23/31 , H01L23/367 , H01L21/56
CPC classification number: H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49562 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/41 , H01L25/50 , H01L2224/131 , H01L2224/16245 , H01L2224/32245 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/4103 , H01L2224/73253 , H01L2224/84801 , H01L2924/00013 , H01L2924/01029 , H01L2924/13091 , H01L2924/181 , H01L2924/18161 , H01L2924/014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2924/00012
Abstract: 一种联合封装高端和低端芯片的半导体器件及其制造方法,该器件中低端和高端芯片分别粘贴在导电的引线框架的两边,使低端芯片的底部漏极电性连接载片基座的顶面,高端芯片的顶部源极通过对应的焊球,电性连接在载片基座的底面。本发明中由于低端芯片、引线框架的载片基座、高端芯片是立体布置的,能够减小整个器件的尺寸;将三者塑封之后,所述高端芯片背面覆盖的金属层或导电金属贴片,暴露设置在该半导体器件背面的封装体以外,有效改善器件的散热性能。
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公开(公告)号:CN104603934A
公开(公告)日:2015-05-06
申请号:CN201380044807.9
申请日:2013-08-09
Applicant: 三菱电机株式会社
CPC classification number: H05K1/0203 , H01L23/13 , H01L23/36 , H01L23/3735 , H01L23/492 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/84 , H01L24/85 , H01L24/92 , H01L25/07 , H01L25/072 , H01L25/18 , H01L2224/04026 , H01L2224/04034 , H01L2224/04042 , H01L2224/0603 , H01L2224/06181 , H01L2224/29111 , H01L2224/32245 , H01L2224/37012 , H01L2224/37147 , H01L2224/4005 , H01L2224/40105 , H01L2224/4024 , H01L2224/4118 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/4824 , H01L2224/48472 , H01L2224/49175 , H01L2224/73263 , H01L2224/73265 , H01L2224/83424 , H01L2224/83447 , H01L2224/8346 , H01L2224/83801 , H01L2224/84447 , H01L2224/84801 , H01L2224/85205 , H01L2224/92247 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/13055 , H01L2924/13091 , H01L2924/15724 , H01L2924/15747 , H01L2924/1576 , H01L2924/16152 , H01L2924/16172 , H01L2924/16251 , H01L2924/181 , H01L2924/19107 , H01L2224/48247 , H01L2924/00012 , H01L2224/291 , H01L2924/014 , H01L2924/00014 , H01L2224/92252 , H01L2224/85 , H01L2224/40499 , H01L2224/8546 , H01L2224/85424 , H01L2224/85447 , H01L2924/01074 , H01L2224/3716 , H01L2224/37124 , H01L2924/01083 , H01L2924/01051 , H01L2924/00 , H01L2924/207 , H01L2224/48624 , H01L2924/00011 , H01L2224/48647 , H01L2224/4866 , H01L2224/48824 , H01L2224/4886 , H01L2224/48747 , H01L2224/48847 , H01L2224/48724 , H01L2224/4876 , H01L2924/013 , H01L2924/01029 , H01L2924/01047 , H01L2924/00013 , H01L2924/2076
Abstract: 本发明具备:传热板(4),隔着绝缘层(8)接合散热部件(9);印制基板(3),相对传热板(4)隔开规定的间隔地配置,在外侧面形成了的电极图案(32)的附近设置了开口部(3a);电力用半导体元件(2),配置于传热板(4)与印制基板(3)之间,背面与传热板(4)接合;以及布线部件(5),一端与在电力用半导体元件(2)的表面形成了的主电力用电极(21C)的第1接合部接合,另一端与第2接合部(32p)接合,构成为在从主电力用电极(21C)朝向印制基板(3)地在垂直方向上延伸的空间中放入第2接合部(32p)的至少一部分,并且在从开口部(3a)起在垂直方向上延伸的空间中包含第1接合部。
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公开(公告)号:CN104601154A
公开(公告)日:2015-05-06
申请号:CN201410595368.7
申请日:2014-10-30
Applicant: 英飞凌科技奥地利有限公司
IPC: H03K17/56
CPC classification number: H03K17/687 , H01L24/36 , H01L24/40 , H01L24/41 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/18 , H01L2224/06181 , H01L2224/14 , H01L2224/16225 , H01L2224/32145 , H01L2224/40225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/73221 , H01L2224/73257 , H01L2224/73265 , H01L2224/83801 , H01L2924/00014 , H01L2924/10253 , H01L2924/1033 , H01L2924/13055 , H01L2924/13064 , H01L2924/13091 , H01L2924/15192 , H01L2924/181 , H03K17/102 , H03K2017/6875 , H03K2217/0027 , H01L2924/00 , H01L2924/00012 , H01L2224/37099 , H01L2224/84
Abstract: 开关电路。在实施例中,开关电路包括输入漏极、源极和栅极节点、包括与低电压增强模式晶体管的电流路径串联耦合的电流路径的高电压耗尽模式晶体管、以及用于感测流经电流感测路径的电流的电流感测电路。
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公开(公告)号:CN102790513B
公开(公告)日:2014-12-10
申请号:CN201210268316.X
申请日:2012-07-30
Applicant: 华为技术有限公司
CPC classification number: H01L23/495 , H01L24/37 , H01L24/40 , H01L24/41 , H01L25/16 , H01L2224/371 , H01L2224/37124 , H01L2224/40095 , H01L2224/40139 , H01L2224/40245 , H01L2224/45144 , H01L2224/48247 , H01L2224/49171 , H01L2924/00011 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/01004 , H01L2924/01033 , H01L2924/00015 , H01L2224/45147 , H01L2224/84
Abstract: 本发明提供一种电源模块和电源模块的封装方法。其中,该电源模块包括引线框架、集成电路、无源器件和至少一个半导体裸芯片,所述无源器件中的至少一个磁性器件为通过磁芯和电气绕组组装成的分离式磁性器件;所述电气绕组的一端与所述引线框架电连接,以使所述电气绕组的一端通过所述引线框架与所述集成电路和除磁性器件之外的无源器件电连接;所述电气绕组的另一端直接与所述半导体裸芯片电连接。本发明降低了电源模块中绕线磁性器件的失效概率,提高了电源模块的可靠性。
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公开(公告)号:CN104103617A
公开(公告)日:2014-10-15
申请号:CN201410129154.0
申请日:2014-04-01
Applicant: 英飞凌科技奥地利有限公司
IPC: H01L23/49
CPC classification number: H01L23/49524 , H01L23/051 , H01L23/3107 , H01L23/49562 , H01L23/49575 , H01L24/33 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/40245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/181 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
Abstract: 本发明涉及一种多层半导体封装。半导体封装包括:半导体裸片,具有在第一侧的第一电极和相对第一侧的、在第二侧处的第二电极;第一引线,在半导体裸片下,并且连接到在封装的第一层处连接到的第一电极;以及第二引线,具有大于第一引线的高度并且在封装中的第一层之上的第二层处终止,该第二层对应于半导体裸片的高度。在半导体裸片和第二引线之上的单个连续平面结构的连接器在封装的相同的第二层处连接到第二电极和第二引线。
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