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    ORDERED TWO-PHASE DIELECTRIC FILM, AND SEMICONDUCTOR DEVICE CONTAINING THE SAME
    31.
    发明专利
    ORDERED TWO-PHASE DIELECTRIC FILM, AND SEMICONDUCTOR DEVICE CONTAINING THE SAME 未知

    公开(公告)号：MY126213A

    公开(公告)日：2006-09-29

    申请号：MYPI20021589

    申请日：2002-04-30

    Applicant: IBM

    Inventor： GATES STEPHEN MCCONELL ,  MURRAY CHRISTOPHER B ,  NITTA SATYANARAYANA V ,  PURUSHOTHAMAN SAMPATH

    IPC: B32B3/10 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

    Abstract: A POROUS, LOW-K DIELECTRIC FILM THAT HAS GOOD MECHANICAL PROPERTIES AS WELL AS A METHOD OF FABRICATING THE FILM AND THE USE OF THE FILM AS A DIELECTRIC LAYER BETWEEN METAL WIRING FEATURES ARE PROVIDED . THE POROUS, LOW-K DIELECTRIC FILM INCLUDES A FIRST PHASE OF MONODISPERSED PORES HAVING A DIAMETER OF FROM ABOUT 1 TO ABOUT 10 NM THAT ARE SUBSTANTIALLY UNIFORMLY SPACED APART AND ARE ESSENTIALLY LOCATED ON SITES OF A THREE-DIMENSIONAL PERIODIC LATTICE; AND A SECOND PHASE WHICH IS SOLID SURROUNDING THE FIRST PHASE. SPECIFICALLY, THE SECOND PHASE OF THE FILM INCLUDES (i) AN ORDERED ELEMENT THAT IS COMPOSED OF NANOPARTICLES HAVING A DIAMETER OF FROM ABOUT 1 TO ABOUT 10 NM THAT ARE SUBSTANTIALLY UNIFORMLY SPACED APART AND ARE ESSENTIALLY ARRANGED ON SITES OF A THREE-DIMENSIONAL PERIODIC LATTICE, AND (ii) A DISORDERS ELEMENT COMPRISED OF A DIELECTRIC MATERIAL HAVING A DIELECTRIC CONSTANT OF ABOUT 2.8 OR LESS. (FIG 1A)

    Protective hardmask for producing interconnect structures
    33.
    发明专利
    Protective hardmask for producing interconnect structures 未知

    公开(公告)号：GB2368457A

    公开(公告)日：2002-05-01

    申请号：GB0108448

    申请日：2001-04-03

    Applicant: IBM

    Inventor： DALTON TIMOTHY JOSEPH ,  JAHNES CHRISTOPHER V ,  LIU JOYCE C ,  PURUSHOTHAMAN SAMPATH

    IPC: H01L21/28 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/52

    Abstract: A permanent protective hardmask 40 protects the dielectric properties of a main bulk dielectric layer 30 having a desirably low dielectric constant in a semiconductor device from undesirable increases in the dielectric constant, undesirable increases in current leakage, and low device yield from surface scratching during subsequent processing steps. The protective hardmask 40 further includes a single layer 50 or dual layer 50,60 sacrificial hardmask particularly useful when interconnect structures such as via openings and/or lines are formed in the low dielectric material during the course of making the final product. The sacrificial hardmask layers 50,60 and the permanent hardmask layer 40 may be formed in a single step from a same precursor wherein process conditions are altered to provide films of differing dielectric constants. Most preferably, a dual damascene structure has a tri-layer hardmask comprising silicon carbide, PECVD silicon nitride, and PECVD silicon dioxide, respectively, formed over a bulk low dielectric constant interlevel dielectric prior to forming the interconnect structures in the interlevel dielectric. The protective hardmask 40 has a low dielectric constant k which may be the same or similar to that of the bulk dielectric layer 30.

    Method for forming a porous dielectric material layer in a semiconductor device and device formed
    36.
    发明专利
    Method for forming a porous dielectric material layer in a semiconductor device and device formed 未知

    公开(公告)号：SG125963A1

    公开(公告)日：2006-10-30

    申请号：SG200403087

    申请日：2001-12-11

    Applicant: IBM

    Inventor： DALTON TIMOTHY JOSEPH ,  GRECO STEPHEN EDWARD ,  HEDRICK JEFFREY CURTIS ,  NITTA SATYANARANA V ,  PURUSHOTHAMAN SAMPATH ,  RODBELL KENNETH PARKER ,  ROSENBERG ROBERT

    IPC: H01L21/31 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532

    Abstract: A method for forming a porous dielectric material layer (14) in an electronic structure (70) and the stricture (70) formed are disclosed. In the method, a porous dielectric layer (14) in a semiconductor device (70) can be formed by first forming (10) a non-porous dielectric layer (14),- then partially curing (20), patterning (30) by reactive ion etching, and final curing (40) the non-porous dielectric layer (14) at a higher temperature than the partial curing (20) temperature to transform the non-porous dielectric material (14) into a porous dielectric material (14), thus achieving 'a dielectric material that has significantly improved dielectric constant, i.e. smaller than 2.6. The non-porous dielectric material (14) may be formed by embedding a thermally stable dielectric material such as methyl silsesquioxane, hydrogen silsesquioxane, benzocyclobutene or aromatic thermoset polymers with a second phase polymeric material therein such that, at the higher curing temperature, the second phase polymeric material substantially volatilizes to leave voids behind forming a void-filled dielectric material.

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